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R600/SI: Add other LDS atomic operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210676 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
507d8cad7b
commit
2da1a85cbb
@ -2210,7 +2210,7 @@ defm : DSWritePat <DS_WRITE_B16, i32, truncstorei16_local>;
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defm : DSWritePat <DS_WRITE_B32, i32, local_store>;
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defm : DSWritePat <DS_WRITE_B64, i64, local_store>;
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multiclass DSAtomicPat<DS inst, ValueType vt, PatFrag frag> {
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multiclass DSAtomicRetPat<DS inst, ValueType vt, PatFrag frag> {
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def : Pat <
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(frag (add i32:$ptr, (i32 IMM16bit:$offset)), vt:$value),
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(inst (i1 0), $ptr, $value, (as_i16imm $offset))
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@ -2222,8 +2222,17 @@ multiclass DSAtomicPat<DS inst, ValueType vt, PatFrag frag> {
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>;
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}
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defm : DSAtomicPat<DS_ADD_RTN_U32, i32, atomic_load_add_local>;
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defm : DSAtomicPat<DS_SUB_RTN_U32, i32, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_WRXCHG_RTN_B32, i32, atomic_swap_local>;
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defm : DSAtomicRetPat<DS_ADD_RTN_U32, i32, atomic_load_add_local>;
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defm : DSAtomicRetPat<DS_SUB_RTN_U32, i32, atomic_load_sub_local>;
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defm : DSAtomicRetPat<DS_AND_RTN_B32, i32, atomic_load_and_local>;
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defm : DSAtomicRetPat<DS_OR_RTN_B32, i32, atomic_load_or_local>;
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defm : DSAtomicRetPat<DS_XOR_RTN_B32, i32, atomic_load_xor_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_I32, i32, atomic_load_min_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_I32, i32, atomic_load_max_local>;
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defm : DSAtomicRetPat<DS_MIN_RTN_U32, i32, atomic_load_umin_local>;
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defm : DSAtomicRetPat<DS_MAX_RTN_U32, i32, atomic_load_umax_local>;
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//===----------------------------------------------------------------------===//
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// MUBUF Patterns
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208
test/CodeGen/R600/local-atomics.ll
Normal file
208
test/CodeGen/R600/local-atomics.ll
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@ -0,0 +1,208 @@
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; FUNC-LABEL: @lds_atomic_xchg_ret_i32:
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; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
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; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
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; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: DS_WRXCHG_RTN_B32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0]
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; SI: BUFFER_STORE_DWORD [[RESULT]],
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; SI: S_ENDPGM
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define void @lds_atomic_xchg_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_xchg_ret_i32_offset:
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; SI: DS_WRXCHG_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_xchg_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; XXX - Is it really necessary to load 4 into VGPR?
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; FUNC-LABEL: @lds_atomic_add_ret_i32:
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; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
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; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
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; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: DS_ADD_RTN_U32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0]
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; SI: BUFFER_STORE_DWORD [[RESULT]],
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; SI: S_ENDPGM
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define void @lds_atomic_add_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_add_ret_i32_offset:
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; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_add_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_sub_ret_i32:
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; SI: DS_SUB_RTN_U32
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; SI: S_ENDPGM
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define void @lds_atomic_sub_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_sub_ret_i32_offset:
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; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_sub_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_and_ret_i32:
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; SI: DS_AND_RTN_B32
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; SI: S_ENDPGM
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define void @lds_atomic_and_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw and i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_and_ret_i32_offset:
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; SI: DS_AND_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_and_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw and i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_or_ret_i32:
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; SI: DS_OR_RTN_B32
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; SI: S_ENDPGM
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define void @lds_atomic_or_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_or_ret_i32_offset:
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; SI: DS_OR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_or_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw or i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_xor_ret_i32:
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; SI: DS_XOR_RTN_B32
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; SI: S_ENDPGM
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define void @lds_atomic_xor_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xor i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_xor_ret_i32_offset:
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; SI: DS_XOR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_xor_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xor i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FIXME: There is no atomic nand instr
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; XFUNC-LABEL: @lds_atomic_nand_ret_i32:uction, so we somehow need to expand this.
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; define void @lds_atomic_nand_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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; %result = atomicrmw nand i32 addrspace(3)* %ptr, i32 4 seq_cst
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; store i32 %result, i32 addrspace(1)* %out, align 4
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; ret void
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; }
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; FUNC-LABEL: @lds_atomic_min_ret_i32:
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; SI: DS_MIN_RTN_I32
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; SI: S_ENDPGM
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define void @lds_atomic_min_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw min i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_min_ret_i32_offset:
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; SI: DS_MIN_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_min_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw min i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_max_ret_i32:
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; SI: DS_MAX_RTN_I32
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; SI: S_ENDPGM
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define void @lds_atomic_max_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw max i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_max_ret_i32_offset:
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; SI: DS_MAX_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_max_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw max i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_umin_ret_i32:
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; SI: DS_MIN_RTN_U32
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; SI: S_ENDPGM
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define void @lds_atomic_umin_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw umin i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_umin_ret_i32_offset:
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; SI: DS_MIN_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_umin_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw umin i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_umax_ret_i32:
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; SI: DS_MAX_RTN_U32
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; SI: S_ENDPGM
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define void @lds_atomic_umax_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw umax i32 addrspace(3)* %ptr, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_umax_ret_i32_offset:
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; SI: DS_MAX_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_umax_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw umax i32 addrspace(3)* %gep, i32 4 seq_cst
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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