6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity

Fix sign extend to long. When coming from sbyte, we used to generate:

Browse Source 
movsbl 4(%esp), %eax
        movl %eax, %edx
        sarl $7, %edx

Now we generate:

        movsbl 4(%esp), %eax
        movl %eax, %edx
        sarl $31, %edx

Which is right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19515 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-12 18:19:52 +00:00
parent 9ffdfb6bae
commit 2dad454af6
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -805,8 +805,8 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
// The high part is obtained by SRA'ing all but one of the bits of the lo
// part.
unsigned SrcSize = MVT::getSizeInBits(Node->getOperand(0).getValueType());
Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(SrcSize-1, MVT::i8));
unsigned LoSize = MVT::getSizeInBits(Lo.getValueType());
Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1, MVT::i8));
break;
}
case ISD::ZERO_EXTEND: