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https://github.com/c64scene-ar/llvm-6502.git
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remove fastcc (not fastcall) support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34730 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -377,8 +377,7 @@ namespace llvm {
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SDOperand LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,unsigned CC);
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// Fast and FastCall Calling Convention implementation.
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SDOperand LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG,
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bool isFastCall = false);
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SDOperand LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC);
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SDOperand LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG);
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@@ -412,20 +411,4 @@ namespace llvm {
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};
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}
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// FASTCC_NUM_INT_ARGS_INREGS - This is the max number of integer arguments
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// to pass in registers. 0 is none, 1 is is "use EAX", 2 is "use EAX and
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// EDX". Anything more is illegal.
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//
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// FIXME: The linscan register allocator currently has problem with
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// coalescing. At the time of this writing, whenever it decides to coalesce
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// a physreg with a virtreg, this increases the size of the physreg's live
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// range, and the live range cannot ever be reduced. This causes problems if
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// too many physregs are coaleced with virtregs, which can cause the register
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// allocator to wedge itself.
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//
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// This code triggers this problem more often if we pass args in registers,
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// so disable it until this is fixed.
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//
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#define FASTCC_NUM_INT_ARGS_INREGS 0
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#endif // X86ISELLOWERING_H
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