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https://github.com/c64scene-ar/llvm-6502.git
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Add alignment value to allowsUnalignedMemoryAccess
Rename to allowsMisalignedMemoryAccess. On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment, and don't need to be split into multiple accesses. Vector loads with an alignment of the element type are not uncommon in OpenCL code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214055 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -426,7 +426,9 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
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assert(LD->getExtensionType() == ISD::NON_EXTLOAD &&
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"Unexpected extension type");
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assert(LD->getMemoryVT() == MVT::i32 && "Unexpected load EVT");
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if (allowsUnalignedMemoryAccesses(LD->getMemoryVT()))
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if (allowsMisalignedMemoryAccesses(LD->getMemoryVT(),
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LD->getAddressSpace(),
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LD->getAlignment()))
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return SDValue();
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unsigned ABIAlignment = getDataLayout()->
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@@ -504,7 +506,9 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const
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StoreSDNode *ST = cast<StoreSDNode>(Op);
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assert(!ST->isTruncatingStore() && "Unexpected store type");
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assert(ST->getMemoryVT() == MVT::i32 && "Unexpected store EVT");
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if (allowsUnalignedMemoryAccesses(ST->getMemoryVT())) {
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if (allowsMisalignedMemoryAccesses(ST->getMemoryVT(),
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ST->getAddressSpace(),
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ST->getAlignment())) {
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return SDValue();
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}
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unsigned ABIAlignment = getDataLayout()->
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@@ -1803,7 +1807,9 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
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// Replace unaligned store of unaligned load with memmove.
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StoreSDNode *ST = cast<StoreSDNode>(N);
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if (!DCI.isBeforeLegalize() ||
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allowsUnalignedMemoryAccesses(ST->getMemoryVT()) ||
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allowsMisalignedMemoryAccesses(ST->getMemoryVT(),
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ST->getAddressSpace(),
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ST->getAlignment()) ||
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ST->isVolatile() || ST->isIndexed()) {
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break;
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}
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