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Remove redundant semicolons which are null statements.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163547 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dmitri Gribenko 2012-09-10 21:26:47 +00:00
parent 8631a90f46
commit 2de0572cae
6 changed files with 7 additions and 7 deletions
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4
lib/CodeGen/LiveIntervalAnalysis.cpp
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@ -442,7 +442,7 @@ void LiveIntervals::computeIntervals() {
// Compute the number of register mask instructions in this block.
std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()];
RMB.second = RegMaskSlots.size() - RMB.first;;
RMB.second = RegMaskSlots.size() - RMB.first;
}
// Create empty intervals for registers defined by implicit_def's (except
@ -499,7 +499,7 @@ void LiveIntervals::computeRegMasks() {
RegMaskBits.push_back(MO->getRegMask());
}
// Compute the number of register mask instructions in this block.
RMB.second = RegMaskSlots.size() - RMB.first;;
RMB.second = RegMaskSlots.size() - RMB.first;
}
}

2
lib/CodeGen/StackColoring.cpp
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@ -220,7 +220,7 @@ unsigned StackColoring::collectMarkers(unsigned NumSlot) {
FI != FE; ++FI) {
// Assign a serial number to this basic block.
BasicBlocks[*FI] = BasicBlockNumbering.size();;
BasicBlocks[*FI] = BasicBlockNumbering.size();
BasicBlockNumbering.push_back(*FI);
BlockLiveness[*FI].Begin.resize(NumSlot);

2
lib/MC/MCParser/ELFAsmParser.cpp
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@ -203,7 +203,7 @@ bool ELFAsmParser::ParseDirectiveSize(StringRef, SMLoc) {
StringRef Name;
if (getParser().ParseIdentifier(Name))
return TokError("expected identifier in directive");
MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);;
MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);
if (getLexer().isNot(AsmToken::Comma))
return TokError("unexpected token in directive");

2
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
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@ -410,7 +410,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
if (Type == macho::RIT_ARM_Half) {
// The other-half value only gets populated for the movt and movw
// relocation entries.
uint32_t Value = 0;;
uint32_t Value = 0;
switch ((unsigned)Fixup.getKind()) {
default: break;
case ARM::fixup_arm_movw_lo16:

2
lib/Target/Mips/MipsAsmPrinter.cpp
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@ -213,7 +213,7 @@ const char *MipsAsmPrinter::getCurrentABIString() const {
case MipsSubtarget::N32: return "abiN32";
case MipsSubtarget::N64: return "abi64";
case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
default: llvm_unreachable("Unknown Mips ABI");;
default: llvm_unreachable("Unknown Mips ABI");
}
}

2
lib/Target/X86/X86ISelLowering.cpp
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@ -11024,7 +11024,7 @@ SDValue X86TargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,
LHS1 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, Extra);
LHS2 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, Extra);
return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);;
return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);
}
// fall through
case MVT::v4i32: