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Rename SlotIndexes to match how they are used.

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The old naming scheme (load/use/def/store) can be traced back to an old
linear scan article, but the names don't match how slots are actually
used.

The load and store slots are not needed after the deferred spill code
insertion framework was deleted.

The use and def slots don't make any sense because we are using
half-open intervals as is customary in C code, but the names suggest
closed intervals.  In reality, these slots were used to distinguish
early-clobber defs from normal defs.

The new naming scheme also has 4 slots, but the names match how the
slots are really used.  This is a purely mechanical renaming, but some
of the code makes a lot more sense now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144503 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-11-13 20:45:27 +00:00
parent e6a6277d36
commit 2debd48ca7
15 changed files with 161 additions and 155 deletions
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17
lib/CodeGen/RenderMachineFunction.cpp
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@ -560,12 +560,13 @@ namespace llvm {
// For uses/defs recorded use/def indexes override current liveness and
// instruction operands (Only for the interval which records the indexes).
if (i.isUse() || i.isDef()) {
// FIXME: This is all wrong, uses and defs share the same slots.
if (i.isEarlyClobber() || i.isRegister()) {
UseDefs::const_iterator udItr = useDefs.find(li);
if (udItr != useDefs.end()) {
const SlotSet &slotSet = udItr->second;
if (slotSet.count(i)) {
if (i.isUse()) {
if (i.isEarlyClobber()) {
return Used;
}
// else
@ -586,9 +587,9 @@ namespace llvm {
return AliveStack;
}
} else {
if (i.isDef() && mi->definesRegister(li->reg, tri)) {
if (i.isRegister() && mi->definesRegister(li->reg, tri)) {
return Defined;
} else if (i.isUse() && mi->readsRegister(li->reg)) {
} else if (i.isEarlyClobber() && mi->readsRegister(li->reg)) {
return Used;
} else {
if (vrm == 0 ||
@ -804,7 +805,7 @@ namespace llvm {
os << indent + s(2) << "<tr height=6ex>\n";
// Render the code column.
if (i.isLoad()) {
if (i.isBlock()) {
MachineBasicBlock *mbb = sis->getMBBFromIndex(i);
mi = sis->getInstructionFromIndex(i);
@ -823,7 +824,7 @@ namespace llvm {
}
os << indent + s(4) << "</td>\n";
} else {
i = i.getStoreIndex(); // <- Will be incremented to the next index.
i = i.getDeadSlot(); // <- Will be incremented to the next index.
continue;
}
}
@ -952,10 +953,10 @@ namespace llvm {
rItr != rEnd; ++rItr) {
const MachineInstr *mi = &*rItr;
if (mi->readsRegister(li->reg)) {
useDefs[li].insert(lis->getInstructionIndex(mi).getUseIndex());
useDefs[li].insert(lis->getInstructionIndex(mi).getRegSlot(true));
}
if (mi->definesRegister(li->reg)) {
useDefs[li].insert(lis->getInstructionIndex(mi).getDefIndex());
useDefs[li].insert(lis->getInstructionIndex(mi).getRegSlot());
}
}
}