From 2e06398405c61d6d2aa99785fe34d34c33808330 Mon Sep 17 00:00:00 2001 From: Wesley Peck Date: Thu, 2 Dec 2010 16:17:11 +0000 Subject: [PATCH] Teaching MBlaze backend how to reverse branch conditions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120707 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/MBlaze/MBlazeInstrInfo.cpp | 30 +++++++++++++++++++++++++++ lib/Target/MBlaze/MBlazeInstrInfo.h | 5 +++++ 2 files changed, 35 insertions(+) diff --git a/lib/Target/MBlaze/MBlazeInstrInfo.cpp b/lib/Target/MBlaze/MBlazeInstrInfo.cpp index d7c11f2a699..57c03feb974 100644 --- a/lib/Target/MBlaze/MBlazeInstrInfo.cpp +++ b/lib/Target/MBlaze/MBlazeInstrInfo.cpp @@ -234,6 +234,36 @@ unsigned MBlazeInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { return 2; } +bool MBlazeInstrInfo::ReverseBranchCondition(SmallVectorImpl &Cond) const { + assert(Cond.size() == 2 && "Invalid MBlaze branch opcode!"); + switch (Cond[0].getImm()) { + default: return true; + case MBlaze::BEQ: Cond[0].setImm(MBlaze::BNE); return false; + case MBlaze::BNE: Cond[0].setImm(MBlaze::BEQ); return false; + case MBlaze::BGT: Cond[0].setImm(MBlaze::BLE); return false; + case MBlaze::BGE: Cond[0].setImm(MBlaze::BLT); return false; + case MBlaze::BLT: Cond[0].setImm(MBlaze::BGE); return false; + case MBlaze::BLE: Cond[0].setImm(MBlaze::BGT); return false; + case MBlaze::BEQI: Cond[0].setImm(MBlaze::BNEI); return false; + case MBlaze::BNEI: Cond[0].setImm(MBlaze::BEQI); return false; + case MBlaze::BGTI: Cond[0].setImm(MBlaze::BLEI); return false; + case MBlaze::BGEI: Cond[0].setImm(MBlaze::BLTI); return false; + case MBlaze::BLTI: Cond[0].setImm(MBlaze::BGEI); return false; + case MBlaze::BLEI: Cond[0].setImm(MBlaze::BGTI); return false; + case MBlaze::BEQD: Cond[0].setImm(MBlaze::BNED); return false; + case MBlaze::BNED: Cond[0].setImm(MBlaze::BEQD); return false; + case MBlaze::BGTD: Cond[0].setImm(MBlaze::BLED); return false; + case MBlaze::BGED: Cond[0].setImm(MBlaze::BLTD); return false; + case MBlaze::BLTD: Cond[0].setImm(MBlaze::BGED); return false; + case MBlaze::BLED: Cond[0].setImm(MBlaze::BGTD); return false; + case MBlaze::BEQID: Cond[0].setImm(MBlaze::BNEID); return false; + case MBlaze::BNEID: Cond[0].setImm(MBlaze::BEQID); return false; + case MBlaze::BGTID: Cond[0].setImm(MBlaze::BLEID); return false; + case MBlaze::BGEID: Cond[0].setImm(MBlaze::BLTID); return false; + case MBlaze::BLTID: Cond[0].setImm(MBlaze::BGEID); return false; + case MBlaze::BLEID: Cond[0].setImm(MBlaze::BGTID); return false; + } +} /// getGlobalBaseReg - Return a virtual register initialized with the /// the global base register value. Output instructions required to diff --git a/lib/Target/MBlaze/MBlazeInstrInfo.h b/lib/Target/MBlaze/MBlazeInstrInfo.h index 91392f92e4f..b7300c14080 100644 --- a/lib/Target/MBlaze/MBlazeInstrInfo.h +++ b/lib/Target/MBlaze/MBlazeInstrInfo.h @@ -257,6 +257,11 @@ public: const SmallVectorImpl &Cond, DebugLoc DL) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; + + virtual bool ReverseBranchCondition(SmallVectorImpl &Cond) + const; + + virtual void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg,