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Reapply 154397. Original message:

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Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2012-04-11 08:26:11 +00:00
parent 21293ac192
commit 2e506198c8
1 changed files with 18 additions and 11 deletions
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15
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4354,12 +4354,17 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
// Only do this before legalize for now. // Only do this before legalize for now.
if (VT.isVector() && !LegalOperations) { if (VT.isVector() && !LegalOperations) {
EVT N0VT = N0.getOperand(0).getValueType(); EVT N0VT = N0.getOperand(0).getValueType();
// On some architectures (such as SSE/NEON/etc) the SETCC result type is
// of the same size as the compared operands. Only optimize sext(setcc())
// if this is the case.
EVT SVT = TLI.getSetCCResultType(N0VT);
// We know that the # elements of the results is the same as the // We know that the # elements of the results is the same as the
// # elements of the compare (and the # elements of the compare result // # elements of the compare (and the # elements of the compare result
// for that matter). Check to see that they are the same size. If so, // for that matter). Check to see that they are the same size. If so,
// we know that the element size of the sext'd result matches the // we know that the element size of the sext'd result matches the
// element size of the compare operands. // element size of the compare operands.
if (VT.getSizeInBits() == N0VT.getSizeInBits()) if (VT.getSizeInBits() == SVT.getSizeInBits())
return DAG.getSetCC(N->getDebugLoc(), VT, N0.getOperand(0), return DAG.getSetCC(N->getDebugLoc(), VT, N0.getOperand(0),
N0.getOperand(1), N0.getOperand(1),
cast<CondCodeSDNode>(N0.getOperand(2))->get()); cast<CondCodeSDNode>(N0.getOperand(2))->get());
@ -4373,13 +4378,15 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
EVT MatchingVectorType = EVT MatchingVectorType =
EVT::getVectorVT(*DAG.getContext(), MatchingElementType, EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
N0VT.getVectorNumElements()); N0VT.getVectorNumElements());
SDValue VsetCC =
DAG.getSetCC(N->getDebugLoc(), MatchingVectorType, N0.getOperand(0), if (SVT == MatchingVectorType) {
N0.getOperand(1), SDValue VsetCC = DAG.getSetCC(N->getDebugLoc(), MatchingVectorType,
N0.getOperand(0), N0.getOperand(1),
cast<CondCodeSDNode>(N0.getOperand(2))->get()); cast<CondCodeSDNode>(N0.getOperand(2))->get());
return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT); return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
} }
} }
}
// sext(setcc x, y, cc) -> (select_cc x, y, -1, 0, cc) // sext(setcc x, y, cc) -> (select_cc x, y, -1, 0, cc)
unsigned ElementWidth = VT.getScalarType().getSizeInBits(); unsigned ElementWidth = VT.getScalarType().getSizeInBits();