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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-24 09:29:42 +00:00
Properly enable rematerialization when spilling after live range splitting.
The instruction to be rematerialized may not be the one defining the register that is being spilled. The traceSiblingValue() function sees through sibling copies to find the remat candidate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128449 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
parent
8470475d6b
commit
2ef661b0e8
@ -120,13 +120,14 @@ private:
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}
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bool isSibling(unsigned Reg);
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void traceSiblingValue(unsigned, VNInfo*, VNInfo*);
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MachineInstr *traceSiblingValue(unsigned, VNInfo*, VNInfo*);
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void analyzeSiblingValues();
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bool hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI);
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void eliminateRedundantSpills(LiveInterval &LI, VNInfo *VNI);
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bool reMaterializeFor(MachineBasicBlock::iterator MI);
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void markValueUsed(LiveInterval*, VNInfo*);
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bool reMaterializeFor(LiveInterval&, MachineBasicBlock::iterator MI);
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void reMaterializeAll();
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bool coalesceStackAccess(MachineInstr *MI, unsigned Reg);
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@ -277,10 +278,10 @@ bool InlineSpiller::isSibling(unsigned Reg) {
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/// Determine if the value is defined by all reloads, so spilling isn't
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/// necessary - the value is already in the stack slot.
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///
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/// Find a defining instruction that may be a candidate for rematerialization.
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/// Return a defining instruction that may be a candidate for rematerialization.
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///
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void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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VNInfo *OrigVNI) {
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MachineInstr *InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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VNInfo *OrigVNI) {
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DEBUG(dbgs() << "Tracing value " << PrintReg(UseReg) << ':'
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<< UseVNI->id << '@' << UseVNI->def << '\n');
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SmallPtrSet<VNInfo*, 8> Visited;
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@ -365,7 +366,7 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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// We have an 'original' def. Don't record trivial cases.
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if (VNI == UseVNI) {
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DEBUG(dbgs() << "Not a sibling copy.\n");
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return;
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return MI;
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}
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// Potential remat candidate.
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@ -385,10 +386,13 @@ void InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
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<< SVI.SpillVNI->id << '@' << SVI.SpillVNI->def << '\n';
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});
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SibValues.insert(std::make_pair(UseVNI, SVI));
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return SVI.DefMI;
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}
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/// analyzeSiblingValues - Trace values defined by sibling copies back to
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/// something that isn't a sibling copy.
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///
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/// Keep track of values that may be rematerializable.
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void InlineSpiller::analyzeSiblingValues() {
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SibValues.clear();
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@ -403,11 +407,19 @@ void InlineSpiller::analyzeSiblingValues() {
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for (LiveInterval::const_vni_iterator VI = LI.vni_begin(),
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VE = LI.vni_end(); VI != VE; ++VI) {
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VNInfo *VNI = *VI;
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if (VNI->isUnused() || !(VNI->isPHIDef() || VNI->getCopy()))
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if (VNI->isUnused())
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continue;
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VNInfo *OrigVNI = OrigLI.getVNInfoAt(VNI->def);
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if (OrigVNI->def != VNI->def)
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traceSiblingValue(Reg, VNI, OrigVNI);
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MachineInstr *DefMI = 0;
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// Check possible sibling copies.
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if (VNI->isPHIDef() || VNI->getCopy()) {
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VNInfo *OrigVNI = OrigLI.getVNInfoAt(VNI->def);
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if (OrigVNI->def != VNI->def)
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DefMI = traceSiblingValue(Reg, VNI, OrigVNI);
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}
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if (!DefMI && !VNI->isPHIDef())
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DefMI = LIS.getInstructionFromIndex(VNI->def);
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if (DefMI)
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Edit->checkRematerializable(VNI, DefMI, TII, AA);
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}
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}
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}
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@ -520,12 +532,51 @@ void InlineSpiller::eliminateRedundantSpills(LiveInterval &SLI, VNInfo *VNI) {
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} while (!WorkList.empty());
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}
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/// reMaterializeFor - Attempt to rematerialize before MI instead of reloading.
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bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
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SlotIndex UseIdx = LIS.getInstructionIndex(MI).getUseIndex();
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VNInfo *OrigVNI = Edit->getParent().getVNInfoAt(UseIdx);
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if (!OrigVNI) {
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//===----------------------------------------------------------------------===//
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// Rematerialization
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//===----------------------------------------------------------------------===//
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/// markValueUsed - Remember that VNI failed to rematerialize, so its defining
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/// instruction cannot be eliminated. See through snippet copies
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void InlineSpiller::markValueUsed(LiveInterval *LI, VNInfo *VNI) {
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SmallVector<std::pair<LiveInterval*, VNInfo*>, 8> WorkList;
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WorkList.push_back(std::make_pair(LI, VNI));
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do {
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tie(LI, VNI) = WorkList.pop_back_val();
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if (!UsedValues.insert(VNI))
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continue;
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if (VNI->isPHIDef()) {
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(VNI->def);
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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VNInfo *PVNI = LI->getVNInfoAt(LIS.getMBBEndIdx(*PI).getPrevSlot());
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if (PVNI)
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WorkList.push_back(std::make_pair(LI, PVNI));
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}
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continue;
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}
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// Follow snippet copies.
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MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
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if (!SnippetCopies.count(MI))
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continue;
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LiveInterval &SnipLI = LIS.getInterval(MI->getOperand(1).getReg());
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assert(isRegToSpill(SnipLI.reg) && "Unexpected register in copy");
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VNInfo *SnipVNI = SnipLI.getVNInfoAt(VNI->def.getUseIndex());
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assert(SnipVNI && "Snippet undefined before copy");
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WorkList.push_back(std::make_pair(&SnipLI, SnipVNI));
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} while (!WorkList.empty());
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}
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/// reMaterializeFor - Attempt to rematerialize before MI instead of reloading.
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bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg,
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MachineBasicBlock::iterator MI) {
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SlotIndex UseIdx = LIS.getInstructionIndex(MI).getUseIndex();
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VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx);
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if (!ParentVNI) {
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DEBUG(dbgs() << "\tadding <undef> flags: ");
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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@ -536,15 +587,16 @@ bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
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return true;
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}
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// FIXME: Properly remat for snippets as well.
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if (SnippetCopies.count(MI)) {
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UsedValues.insert(OrigVNI);
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if (SnippetCopies.count(MI))
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return false;
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}
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LiveRangeEdit::Remat RM(OrigVNI);
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// Use an OrigVNI from traceSiblingValue when ParentVNI is a sibling copy.
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LiveRangeEdit::Remat RM(ParentVNI);
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SibValueMap::const_iterator SibI = SibValues.find(ParentVNI);
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if (SibI != SibValues.end())
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RM.OrigMI = SibI->second.DefMI;
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if (!Edit->canRematerializeAt(RM, UseIdx, false, LIS)) {
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UsedValues.insert(OrigVNI);
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markValueUsed(&VirtReg, ParentVNI);
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DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI);
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return false;
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}
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@ -558,7 +610,7 @@ bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
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for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(Ops[i]);
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if (MO.isUse() ? MI->isRegTiedToDefOperand(Ops[i]) : MO.getSubReg()) {
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UsedValues.insert(OrigVNI);
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markValueUsed(&VirtReg, ParentVNI);
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DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *MI);
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return false;
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}
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@ -606,58 +658,48 @@ bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
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/// reMaterializeAll - Try to rematerialize as many uses as possible,
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/// and trim the live ranges after.
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void InlineSpiller::reMaterializeAll() {
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// Do a quick scan of the interval values to find if any are remattable.
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// analyzeSiblingValues has already tested all relevant defining instructions.
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if (!Edit->anyRematerializable(LIS, TII, AA))
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return;
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UsedValues.clear();
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// Try to remat before all uses of Edit->getReg().
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// Try to remat before all uses of snippets.
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bool anyRemat = false;
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for (MachineRegisterInfo::use_nodbg_iterator
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RI = MRI.use_nodbg_begin(Edit->getReg());
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MachineInstr *MI = RI.skipInstruction();)
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anyRemat |= reMaterializeFor(MI);
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for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
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unsigned Reg = RegsToSpill[i];
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LiveInterval &LI = LIS.getInterval(Reg);
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for (MachineRegisterInfo::use_nodbg_iterator
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RI = MRI.use_nodbg_begin(Reg);
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MachineInstr *MI = RI.skipInstruction();)
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anyRemat |= reMaterializeFor(LI, MI);
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}
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if (!anyRemat)
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return;
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// Remove any values that were completely rematted.
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bool anyRemoved = false;
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for (LiveInterval::vni_iterator I = Edit->getParent().vni_begin(),
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E = Edit->getParent().vni_end(); I != E; ++I) {
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VNInfo *VNI = *I;
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if (VNI->hasPHIKill() || !Edit->didRematerialize(VNI) ||
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UsedValues.count(VNI))
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continue;
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MachineInstr *DefMI = LIS.getInstructionFromIndex(VNI->def);
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DEBUG(dbgs() << "\tremoving dead def: " << VNI->def << '\t' << *DefMI);
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LIS.RemoveMachineInstrFromMaps(DefMI);
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VRM.RemoveMachineInstrFromMaps(DefMI);
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DefMI->eraseFromParent();
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VNI->def = SlotIndex();
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anyRemoved = true;
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}
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if (!anyRemoved)
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return;
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// Removing values may cause debug uses where parent is not live.
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for (MachineRegisterInfo::use_iterator RI = MRI.use_begin(Edit->getReg());
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MachineInstr *MI = RI.skipInstruction();) {
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if (!MI->isDebugValue())
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continue;
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// Try to preserve the debug value if parent is live immediately after it.
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MachineBasicBlock::iterator NextMI = MI;
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++NextMI;
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if (NextMI != MI->getParent()->end() && !LIS.isNotInMIMap(NextMI)) {
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SlotIndex Idx = LIS.getInstructionIndex(NextMI);
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VNInfo *VNI = Edit->getParent().getVNInfoAt(Idx);
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if (VNI && (VNI->hasPHIKill() || UsedValues.count(VNI)))
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for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
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unsigned Reg = RegsToSpill[i];
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LiveInterval &LI = LIS.getInterval(Reg);
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for (LiveInterval::vni_iterator I = LI.vni_begin(), E = LI.vni_end();
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I != E; ++I) {
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VNInfo *VNI = *I;
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if (VNI->isUnused() || VNI->isPHIDef() || VNI->hasPHIKill() ||
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UsedValues.count(VNI))
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continue;
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MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
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MI->addRegisterDead(Reg, &TRI);
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if (!MI->allDefsAreDead())
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continue;
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DEBUG(dbgs() << "All defs dead: " << *MI);
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DeadDefs.push_back(MI);
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// Remove all Reg references so we don't insert spill code around MI.
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for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
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MOE = MI->operands_end(); MOI != MOE ; ++MOI)
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if (MOI->isReg() && MOI->getReg() == Reg)
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MOI->setReg(0);
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VNI->setIsUnused(true);
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}
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DEBUG(dbgs() << "Removing debug info due to remat:" << "\t" << *MI);
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MI->eraseFromParent();
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}
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}
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@ -34,6 +34,16 @@ LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg,
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return LI;
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}
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void LiveRangeEdit::checkRematerializable(VNInfo *VNI,
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const MachineInstr *DefMI,
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const TargetInstrInfo &tii,
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AliasAnalysis *aa) {
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assert(DefMI && "Missing instruction");
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if (tii.isTriviallyReMaterializable(DefMI, aa))
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remattable_.insert(VNI);
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scannedRemattable_ = true;
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}
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void LiveRangeEdit::scanRemattable(LiveIntervals &lis,
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const TargetInstrInfo &tii,
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AliasAnalysis *aa) {
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@ -45,10 +55,8 @@ void LiveRangeEdit::scanRemattable(LiveIntervals &lis,
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MachineInstr *DefMI = lis.getInstructionFromIndex(VNI->def);
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if (!DefMI)
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continue;
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if (tii.isTriviallyReMaterializable(DefMI, aa))
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remattable_.insert(VNI);
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checkRematerializable(VNI, DefMI, tii, aa);
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}
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scannedRemattable_ = true;
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}
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bool LiveRangeEdit::anyRematerializable(LiveIntervals &lis,
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@ -69,14 +77,11 @@ bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
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UseIdx = UseIdx.getUseIndex();
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for (unsigned i = 0, e = OrigMI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = OrigMI->getOperand(i);
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if (!MO.isReg() || !MO.getReg() || MO.getReg() == getReg())
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if (!MO.isReg() || !MO.getReg() || MO.isDef())
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continue;
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// Reserved registers are OK.
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if (MO.isUndef() || !lis.hasInterval(MO.getReg()))
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continue;
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// We don't want to move any defs.
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if (MO.isDef())
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return false;
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// We cannot depend on virtual registers in uselessRegs_.
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if (uselessRegs_)
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for (unsigned ui = 0, ue = uselessRegs_->size(); ui != ue; ++ui)
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@ -103,16 +108,22 @@ bool LiveRangeEdit::canRematerializeAt(Remat &RM,
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if (!remattable_.count(RM.ParentVNI))
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return false;
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// No defining instruction.
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RM.OrigMI = lis.getInstructionFromIndex(RM.ParentVNI->def);
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assert(RM.OrigMI && "Defining instruction for remattable value disappeared");
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// No defining instruction provided.
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SlotIndex DefIdx;
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if (RM.OrigMI)
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DefIdx = lis.getInstructionIndex(RM.OrigMI);
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else {
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DefIdx = RM.ParentVNI->def;
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RM.OrigMI = lis.getInstructionFromIndex(DefIdx);
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assert(RM.OrigMI && "No defining instruction for remattable value");
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}
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// If only cheap remats were requested, bail out early.
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if (cheapAsAMove && !RM.OrigMI->getDesc().isAsCheapAsAMove())
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return false;
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// Verify that all used registers are available with the same values.
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if (!allUsesAvailableAt(RM.OrigMI, RM.ParentVNI->def, UseIdx, lis))
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if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx, lis))
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return false;
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return true;
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@ -125,6 +125,11 @@ public:
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bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
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AliasAnalysis*);
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/// checkRematerializable - Manually add VNI to the list of rematerializable
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/// values if DefMI may be rematerializable.
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void checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
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const TargetInstrInfo&, AliasAnalysis*);
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/// Remat - Information needed to rematerialize at a specific location.
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struct Remat {
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VNInfo *ParentVNI; // parent_'s value at the remat location.
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