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Add support for encoding immediates in icmp and fcmp. Hopefully, this will
remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
parent
44ee4714a8
commit
2f2fe417f9
@ -1206,16 +1206,42 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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if (isFloat && !Subtarget->hasVFP2())
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return false;
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// Check to see if the 2nd operand is a constant that we can encode directly
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// in the compare.
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uint64_t Imm;
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int EncodedImm = 0;
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bool EncodeImm = false;
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bool isNegativeImm = false;
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if (const ConstantInt *ConstInt = dyn_cast<ConstantInt>(Src2Value)) {
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if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 ||
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SrcVT == MVT::i1) {
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const APInt &CIVal = ConstInt->getValue();
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isNegativeImm = CIVal.isNegative();
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Imm = (isNegativeImm) ? (-CIVal).getZExtValue() : CIVal.getZExtValue();
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EncodedImm = (int)Imm;
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EncodeImm = isThumb2 ? (ARM_AM::getT2SOImmVal(EncodedImm) != -1) :
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(ARM_AM::getSOImmVal(EncodedImm) != -1);
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}
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} else if (const ConstantFP *ConstFP = dyn_cast<ConstantFP>(Src2Value)) {
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if (SrcVT == MVT::f32 || SrcVT == MVT::f64)
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if (ConstFP->isZero() && !ConstFP->isNegative())
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EncodeImm = true;
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}
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unsigned CmpOpc;
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bool isICmp = true;
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bool needsExt = false;
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switch (SrcVT.getSimpleVT().SimpleTy) {
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default: return false;
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// TODO: Verify compares.
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case MVT::f32:
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CmpOpc = ARM::VCMPES;
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isICmp = false;
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CmpOpc = EncodeImm ? ARM::VCMPEZS : ARM::VCMPES;
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break;
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case MVT::f64:
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CmpOpc = ARM::VCMPED;
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isICmp = false;
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CmpOpc = EncodeImm ? ARM::VCMPEZD : ARM::VCMPED;
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break;
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case MVT::i1:
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case MVT::i8:
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@ -1223,30 +1249,56 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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needsExt = true;
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// Intentional fall-through.
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case MVT::i32:
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CmpOpc = isThumb2 ? ARM::t2CMPrr : ARM::CMPrr;
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if (isThumb2) {
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if (!EncodeImm)
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CmpOpc = ARM::t2CMPrr;
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else
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CmpOpc = isNegativeImm ? ARM::t2CMNzri : ARM::t2CMPri;
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} else {
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if (!EncodeImm)
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CmpOpc = ARM::CMPrr;
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else
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CmpOpc = isNegativeImm ? ARM::CMNzri : ARM::CMPri;
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}
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break;
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}
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unsigned SrcReg1 = getRegForValue(Src1Value);
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if (SrcReg1 == 0) return false;
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unsigned SrcReg2 = getRegForValue(Src2Value);
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if (SrcReg2 == 0) return false;
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unsigned SrcReg2;
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if (!EncodeImm) {
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SrcReg2 = getRegForValue(Src2Value);
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if (SrcReg2 == 0) return false;
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}
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// We have i1, i8, or i16, we need to either zero extend or sign extend.
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if (needsExt) {
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unsigned ResultReg;
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EVT DestVT = MVT::i32;
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg1, DestVT, isZExt);
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg1 = ResultReg;
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg2, DestVT, isZExt);
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if (ResultReg == 0) return false;
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SrcReg2 = ResultReg;
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if (!EncodeImm) {
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg2 = ResultReg;
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}
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}
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CmpOpc))
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.addReg(SrcReg1).addReg(SrcReg2));
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if (!EncodeImm) {
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(CmpOpc))
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.addReg(SrcReg1).addReg(SrcReg2));
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} else {
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MachineInstrBuilder MIB;
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MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CmpOpc))
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.addReg(SrcReg1);
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// Only add immediate for icmp as the immediate for fcmp is an implicit 0.0.
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if (isICmp)
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MIB.addImm(EncodedImm);
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AddOptionalDefs(MIB);
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}
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// For floating point we need to move the result to a comparison register
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// that we can then use for branches.
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214
test/CodeGen/ARM/fast-isel-cmp-imm.ll
Normal file
214
test/CodeGen/ARM/fast-isel-cmp-imm.ll
Normal file
@ -0,0 +1,214 @@
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
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define void @t1a(float %a) uwtable ssp {
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entry:
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; ARM: t1a
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; THUMB: t1a
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%cmp = fcmp oeq float %a, 0.000000e+00
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; ARM: vcmpe.f32 s0, #0
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; THUMB: vcmpe.f32 s0, #0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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declare void @foo()
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; Shouldn't be able to encode -0.0 imm.
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define void @t1b(float %a) uwtable ssp {
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entry:
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; ARM: t1b
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; THUMB: t1b
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%cmp = fcmp oeq float %a, -0.000000e+00
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; ARM: vldr.32
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; ARM: vcmpe.f32 s0, s1
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; THUMB: vldr.32
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; THUMB: vcmpe.f32 s0, s1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t2a(double %a) uwtable ssp {
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entry:
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; ARM: t2a
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; THUMB: t2a
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%cmp = fcmp oeq double %a, 0.000000e+00
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; ARM: vcmpe.f64 d16, #0
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; THUMB: vcmpe.f64 d16, #0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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; Shouldn't be able to encode -0.0 imm.
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define void @t2b(double %a) uwtable ssp {
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entry:
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; ARM: t2b
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; THUMB: t2b
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%cmp = fcmp oeq double %a, -0.000000e+00
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; ARM: vldr.64
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; ARM: vcmpe.f64 d16, d17
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; THUMB: vldr.64
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; THUMB: vcmpe.f64 d16, d17
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t4(i8 signext %a) uwtable ssp {
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entry:
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; ARM: t4
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; THUMB: t4
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%cmp = icmp eq i8 %a, -1
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; ARM: cmn r0, #1
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; THUMB: cmn.w r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t5(i8 zeroext %a) uwtable ssp {
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entry:
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; ARM: t5
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; THUMB: t5
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%cmp = icmp eq i8 %a, 1
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; ARM: cmp r0, #1
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; THUMB: cmp r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t6(i16 signext %a) uwtable ssp {
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entry:
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; ARM: t6
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; THUMB: t6
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%cmp = icmp eq i16 %a, -1
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; ARM: cmn r0, #1
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; THUMB: cmn.w r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t7(i16 zeroext %a) uwtable ssp {
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entry:
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; ARM: t7
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; THUMB: t7
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%cmp = icmp eq i16 %a, 1
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; ARM: cmp r0, #1
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; THUMB: cmp r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t8(i32 %a) uwtable ssp {
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entry:
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; ARM: t8
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; THUMB: t8
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%cmp = icmp eq i32 %a, -1
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; ARM: cmn r0, #1
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; THUMB: cmn.w r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t9(i32 %a) uwtable ssp {
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entry:
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; ARM: t9
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; THUMB: t9
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%cmp = icmp eq i32 %a, 1
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; ARM: cmp r0, #1
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; THUMB: cmp r0, #1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t10(i32 %a) uwtable ssp {
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entry:
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; ARM: t10
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; THUMB: t10
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%cmp = icmp eq i32 %a, 384
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; ARM: cmp r0, #384
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; THUMB: cmp.w r0, #384
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @t11(i32 %a) uwtable ssp {
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entry:
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; ARM: t11
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; THUMB: t11
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%cmp = icmp eq i32 %a, 4096
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; ARM: cmp r0, #4096
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; THUMB: cmp.w r0, #4096
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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