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Fix schedule model for BFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85809 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1205,7 +1205,7 @@ defm BIC : AsI1_bin_irs<0b1110, "bic",
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BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
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def BFC : I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm),
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AddrMode1, Size4Bytes, IndexModeNone, DPFrm, IIC_iALUi,
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AddrMode1, Size4Bytes, IndexModeNone, DPFrm, IIC_iUNAsi,
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"bfc", "\t$dst, $imm", "$src = $dst",
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[(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>,
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Requires<[IsARM, HasV6T2]> {
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@ -787,7 +787,7 @@ defm t2BIC : T2I_bin_w_irs<"bic", BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
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let Constraints = "$src = $dst" in
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def t2BFC : T2I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm),
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IIC_iALUi, "bfc", "\t$dst, $imm",
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IIC_iUNAsi, "bfc", "\t$dst, $imm",
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[(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>;
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def t2SBFX : T2I<(outs GPR:$dst), (ins GPR:$src, imm0_31:$lsb, imm0_31:$width),
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