mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Convert operand iterator over to work like an STL iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1720 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
748697d242
commit
2f898d2074
@ -12,8 +12,6 @@
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#include "llvm/Target/MachineInstrInfo.h"
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#include <iterator>
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class Instruction;
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template<class _MI, class _V> class ValOpIterator;
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//---------------------------------------------------------------------------
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// class MachineOperand
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@ -88,7 +86,7 @@ public:
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// Accessor methods. Caller is responsible for checking the
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// operand type before invoking the corresponding accessor.
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//
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inline MachineOperandType getOperandType () const {
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inline MachineOperandType getOperandType() const {
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return opType;
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}
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inline Value* getVRegValue () const {
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@ -124,9 +122,6 @@ private:
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void InitializeReg (int regNum);
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friend class MachineInstr;
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friend class ValOpIterator<const MachineInstr, const Value>;
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friend class ValOpIterator< MachineInstr, Value>;
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public:
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@ -237,17 +232,12 @@ MachineOperand::InitializeReg(int _regNum)
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//---------------------------------------------------------------------------
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class MachineInstr : public NonCopyable {
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private:
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MachineOpCode opCode;
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OpCodeMask opCodeMask; // extra bits for variants of an opcode
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std::vector<MachineOperand> operands;
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std::vector<Value*> implicitRefs; // values implicitly referenced by this
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std::vector<bool> implicitIsDef; // machine instruction (eg, call args)
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public:
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typedef ValOpIterator<const MachineInstr, const Value> val_const_op_iterator;
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typedef ValOpIterator<const MachineInstr, Value> val_op_iterator;
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public:
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/*ctor*/ MachineInstr (MachineOpCode _opCode,
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OpCodeMask _opCodeMask = 0x0);
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@ -262,50 +252,113 @@ public:
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//
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unsigned int getNumOperands () const { return operands.size(); }
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bool operandIsDefined(unsigned int i) const;
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bool operandIsDefined(unsigned i) const;
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const MachineOperand& getOperand (unsigned int i) const;
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MachineOperand& getOperand (unsigned int i);
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const MachineOperand& getOperand (unsigned i) const;
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MachineOperand& getOperand (unsigned i);
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//
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// Information about implicit operands of the instruction
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//
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unsigned int getNumImplicitRefs() const{return implicitRefs.size();}
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unsigned getNumImplicitRefs() const{return implicitRefs.size();}
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bool implicitRefIsDefined(unsigned int i) const;
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bool implicitRefIsDefined(unsigned i) const;
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const Value* getImplicitRef (unsigned int i) const;
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Value* getImplicitRef (unsigned int i);
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const Value* getImplicitRef (unsigned i) const;
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Value* getImplicitRef (unsigned i);
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//
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// Debugging support
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//
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void dump (unsigned int indent = 0) const;
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public:
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friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
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friend class val_const_op_iterator;
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friend class val_op_iterator;
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public:
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//
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// Define iterators to access the Value operands of the Machine Instruction.
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// begin() and end() are defined to produce these iterators...
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//
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template<class _MI, class _V> class ValOpIterator;
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typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
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typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
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// Access to set the operands when building the machine instruction
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void SetMachineOperand(unsigned int i,
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void SetMachineOperand(unsigned i,
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MachineOperand::MachineOperandType operandType,
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Value* _val, bool isDef=false);
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void SetMachineOperand(unsigned int i,
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void SetMachineOperand(unsigned i,
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MachineOperand::MachineOperandType operandType,
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int64_t intValue, bool isDef=false);
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void SetMachineOperand(unsigned int i,
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void SetMachineOperand(unsigned i,
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int regNum,
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bool isDef=false);
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void addImplicitRef (Value* val,
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bool isDef=false);
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void setImplicitRef (unsigned int i,
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void setImplicitRef (unsigned i,
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Value* val,
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bool isDef=false);
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template<class MITy, class VTy>
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class ValOpIterator : public std::forward_iterator<VTy, ptrdiff_t> {
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unsigned i;
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MITy MI;
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inline void skipToNextVal() {
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while (i < MI->getNumOperands() &&
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!((MI->getOperand(i).getOperandType() == MachineOperand::MO_VirtualRegister ||
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MI->getOperand(i).getOperandType() == MachineOperand::MO_CCRegister)
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&& MI->getOperand(i).getVRegValue() != 0))
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++i;
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}
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inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
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skipToNextVal();
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}
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public:
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typedef ValOpIterator<MITy, VTy> _Self;
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inline VTy operator*() const { return MI->getOperand(i).getVRegValue(); }
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const MachineOperand &getMachineOperand() const {
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return MI->getOperand(i);
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}
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inline VTy operator->() const { return operator*(); }
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inline bool isDef() const { return MI->getOperand(i).opIsDef(); }
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inline _Self& operator++() { i++; skipToNextVal(); return *this; }
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inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
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inline bool operator==(const _Self &y) const {
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return i == y.i;
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}
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inline bool operator!=(const _Self &y) const {
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return !operator==(y);
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}
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static _Self begin(MITy MI) {
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return _Self(MI, 0);
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}
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static _Self end(MITy MI) {
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return _Self(MI, MI->getNumOperands());
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}
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};
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// define begin() and end()
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val_op_iterator begin() { return val_op_iterator::begin(this); }
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val_op_iterator end() { return val_op_iterator::end(this); }
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const_val_op_iterator begin() const {
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return const_val_op_iterator::begin(this);
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}
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const_val_op_iterator end() const {
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return const_val_op_iterator::end(this);
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}
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};
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@ -369,43 +422,6 @@ MachineInstr::setImplicitRef(unsigned int i,
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}
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template<class _MI, class _V>
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class ValOpIterator : public std::forward_iterator<_V, ptrdiff_t> {
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private:
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unsigned int i;
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int resultPos;
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_MI* minstr;
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inline void skipToNextVal() {
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while (i < minstr->getNumOperands() &&
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! ((minstr->operands[i].opType == MachineOperand::MO_VirtualRegister
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|| minstr->operands[i].opType == MachineOperand::MO_CCRegister)
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&& minstr->operands[i].value != NULL))
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++i;
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}
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public:
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typedef ValOpIterator<_MI, _V> _Self;
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inline ValOpIterator(_MI* _minstr) : i(0), minstr(_minstr) {
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resultPos = TargetInstrDescriptors[minstr->opCode].resultPos;
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skipToNextVal();
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};
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inline _V* operator*() const { return minstr->getOperand(i).getVRegValue();}
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const MachineOperand & getMachineOperand() const { return minstr->getOperand(i); }
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inline _V* operator->() const { return operator*(); }
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// inline bool isDef () const { return (((int) i) == resultPos); }
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inline bool isDef () const { return minstr->getOperand(i).isDef; }
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inline bool done () const { return (i == minstr->getNumOperands()); }
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inline _Self& operator++() { i++; skipToNextVal(); return *this; }
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inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
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};
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//---------------------------------------------------------------------------
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// class MachineCodeForBasicBlock
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@ -45,7 +45,8 @@ void BBLiveVar::calcDefUseSets() {
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}
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// iterate over MI operands to find defs
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for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI)
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for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
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OpI != OpE; ++OpI)
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if (OpI.isDef()) // add to Defs only if this operand is a def
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addDef(*OpI);
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@ -57,10 +58,11 @@ void BBLiveVar::calcDefUseSets() {
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bool IsPhi = MI->getOpCode() == PHI;
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// iterate over MI operands to find uses
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for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI) {
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for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
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OpI != OpE; ++OpI) {
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const Value *Op = *OpI;
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if (Op->getType()->isLabelType())
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if (isa<BasicBlock>(Op))
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continue; // don't process labels
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if (!OpI.isDef()) { // add to Defs only if this operand is a use
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@ -187,7 +187,8 @@ MethodLiveVarInfo::getLiveVarSetAfterMInst(const MachineInstr *MI,
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// machine instruction operand.
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//
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static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
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for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
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for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
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OpE = MInst->end(); OpI != OpE; ++OpI) {
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if (OpI.isDef()) // kill only if this operand is a def
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LVS.insert(*OpI); // this definition kills any uses
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}
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@ -198,7 +199,8 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
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LVS.erase(MInst->getImplicitRef(i));
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}
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for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
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for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
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OpE = MInst->end(); OpI != OpE; ++OpI) {
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if (isa<BasicBlock>(*OpI)) continue; // don't process labels
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if (!OpI.isDef()) // add only if this operand is a use
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@ -206,7 +208,7 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
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}
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// do for implicit operands as well
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for (unsigned i=0; i < MInst->getNumImplicitRefs(); ++i) {
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for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) {
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if (!MInst->implicitRefIsDefined(i))
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LVS.insert(MInst->getImplicitRef(i));
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}
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@ -20,7 +20,6 @@
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#include "SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "llvm/Analysis/LiveVar/ValueSet.h"
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#include "Support/PostOrderIterator.h"
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#include <iostream>
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using std::cerr;
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@ -266,24 +265,25 @@ SchedPriorities::findSetWithMaxDelay(std::vector<candIndex>& mcands,
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bool
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SchedPriorities::instructionHasLastUse(MethodLiveVarInfo& methodLiveVarInfo,
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const SchedGraphNode* graphNode) {
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const MachineInstr* minstr = graphNode->getMachineInstr();
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const MachineInstr *MI = graphNode->getMachineInstr();
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std::hash_map<const MachineInstr*, bool>::const_iterator
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ui = lastUseMap.find(minstr);
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ui = lastUseMap.find(MI);
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if (ui != lastUseMap.end())
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return ui->second;
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// else check if instruction is a last use and save it in the hash_map
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bool hasLastUse = false;
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const BasicBlock* bb = graphNode->getBB();
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const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(minstr, bb);
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const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(MI, bb);
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for (MachineInstr::val_const_op_iterator vo(minstr); !vo.done(); ++vo)
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if (!LVs.count(*vo)) {
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for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end();
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OI != OE; ++OI)
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if (!LVs.count(*OI)) {
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hasLastUse = true;
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break;
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}
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return lastUseMap[minstr] = hasLastUse;
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return lastUseMap[MI] = hasLastUse;
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}
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@ -7,24 +7,15 @@
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#include <iostream>
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using std::cerr;
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//---------------------------------------------------------------------------
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// Constructor
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//---------------------------------------------------------------------------
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LiveRangeInfo::LiveRangeInfo(const Method *const M,
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const TargetMachine& tm,
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LiveRangeInfo::LiveRangeInfo(const Method *M, const TargetMachine &tm,
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std::vector<RegClass *> &RCL)
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: Meth(M), TM(tm),
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RegClassList(RCL), MRI(tm.getRegInfo())
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{ }
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: Meth(M), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
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//---------------------------------------------------------------------------
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// Destructor: Deletes all LiveRanges in the LiveRangeMap
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//---------------------------------------------------------------------------
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LiveRangeInfo::~LiveRangeInfo() {
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LiveRangeMapType::iterator MI = LiveRangeMap.begin();
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for (LiveRangeMapType::iterator MI = LiveRangeMap.begin();
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MI != LiveRangeMap.end(); ++MI) {
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for( ; MI != LiveRangeMap.end() ; ++MI) {
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if (MI->first && MI->second) {
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LiveRange *LR = MI->second;
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@ -33,9 +24,7 @@ LiveRangeInfo::~LiveRangeInfo() {
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// live range. We have to make the other entries NULL when we delete
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// a live range.
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LiveRange::iterator LI = LR->begin();
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for( ; LI != LR->end() ; ++LI)
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for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI)
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LiveRangeMap[*LI] = 0;
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delete LR;
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@ -87,10 +76,9 @@ void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
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// ranges for all values defined in the instruction stream. Also, it
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// creates live ranges for all incoming arguments of the method.
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//---------------------------------------------------------------------------
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void LiveRangeInfo::constructLiveRanges()
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{
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void LiveRangeInfo::constructLiveRanges() {
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if( DEBUG_RA)
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if (DEBUG_RA)
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cerr << "Consturcting Live Ranges ...\n";
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// first find the live ranges for all incoming args of the method since
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@ -129,11 +117,8 @@ void LiveRangeInfo::constructLiveRanges()
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// Now find speical LLVM instructions (CALL, RET) and LRs in machine
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// instructions.
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Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
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for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
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//
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for (Method::const_iterator BBI = Meth->begin(); BBI != Meth->end(); ++BBI) {
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// Now find all LRs for machine the instructions. A new LR will be created
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// only for defs in the machine instr since, we assume that all Values are
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// defined before they are used. However, there can be multiple defs for
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@ -141,12 +126,11 @@ void LiveRangeInfo::constructLiveRanges()
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// get the iterator for machine instructions
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const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
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// iterate over all the machine instructions in BB
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for( ; MInstIterator != MIVec.end(); MInstIterator++) {
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const MachineInstr * MInst = *MInstIterator;
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for(MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
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MInstIterator != MIVec.end(); ++MInstIterator) {
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const MachineInstr *MInst = *MInstIterator;
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// Now if the machine instruction is a call/return instruction,
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// add it to CallRetInstrList for processing its implicit operands
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@ -157,7 +141,8 @@ void LiveRangeInfo::constructLiveRanges()
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// iterate over MI operands to find defs
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for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
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for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
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OpE = MInst->end(); OpI != OpE; ++OpI) {
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if(DEBUG_RA) {
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MachineOperand::MachineOperandType OpTyp =
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OpI.getMachineOperand().getOperandType();
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@ -311,33 +296,27 @@ void LiveRangeInfo::coalesceLRs()
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// iterate over MI operands to find defs
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for(MachineInstr::val_const_op_iterator DefI(MInst);!DefI.done();++DefI){
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if( DefI.isDef() ) { // iff this operand is a def
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for(MachineInstr::const_val_op_iterator DefI = MInst->begin(),
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DefE = MInst->end(); DefI != DefE; ++DefI) {
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if (DefI.isDef()) { // iff this operand is a def
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LiveRange *LROfDef = getLiveRangeForValue( *DefI );
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RegClass *RCOfDef = LROfDef->getRegClass();
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LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
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assert( LROfDef );
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RegClass *const RCOfDef = LROfDef->getRegClass();
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MachineInstr::val_const_op_iterator UseI(MInst);
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for( ; !UseI.done(); ++UseI){ // for all uses
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LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
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if( ! LROfUse ) { // if LR of use is not found
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MachineInstr::const_val_op_iterator UseI = MInst->begin(),
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UseE = MInst->end();
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for( ; UseI != UseE; ++UseI){ // for all uses
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LiveRange *LROfUse = getLiveRangeForValue( *UseI );
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if (!LROfUse) { // if LR of use is not found
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//don't warn about labels
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if (!isa<BasicBlock>(*UseI) && DEBUG_RA)
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cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
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continue; // ignore and continue
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}
|
||||
|
||||
if( LROfUse == LROfDef) // nothing to merge if they are same
|
||||
if (LROfUse == LROfDef) // nothing to merge if they are same
|
||||
continue;
|
||||
|
||||
//RegClass *const RCOfUse = LROfUse->getRegClass();
|
||||
//if( RCOfDef == RCOfUse ) { // if the reg classes are the same
|
||||
|
||||
if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
|
||||
|
||||
// If the two RegTypes are the same
|
||||
@ -356,26 +335,17 @@ void LiveRangeInfo::coalesceLRs()
|
||||
unionAndUpdateLRs(LROfDef, LROfUse);
|
||||
}
|
||||
|
||||
|
||||
} // if combined degree is less than # of regs
|
||||
|
||||
} // if def and use do not interfere
|
||||
|
||||
}// if reg classes are the same
|
||||
|
||||
} // for all uses
|
||||
|
||||
} // if def
|
||||
|
||||
} // for all defs
|
||||
|
||||
} // for all machine instructions
|
||||
|
||||
} // for all BBs
|
||||
|
||||
if( DEBUG_RA)
|
||||
if (DEBUG_RA)
|
||||
cerr << "\nCoalscing Done!\n";
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -395,5 +365,3 @@ void LiveRangeInfo::printLiveRanges() {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -15,7 +15,6 @@
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/CodeGen/MachineCodeForMethod.h"
|
||||
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
|
||||
#include "llvm/Analysis/LiveVar/ValueSet.h"
|
||||
#include "llvm/Analysis/LoopInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Target/MachineFrameInfo.h"
|
||||
@ -310,19 +309,15 @@ void PhyRegAlloc::buildInterferenceGraphs()
|
||||
|
||||
// iterate over all MI operands to find defs
|
||||
//
|
||||
for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
|
||||
|
||||
if( OpI.isDef() ) {
|
||||
// create a new LR iff this operand is a def
|
||||
//
|
||||
for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
|
||||
OpE = MInst->end(); OpI != OpE; ++OpI) {
|
||||
if (OpI.isDef()) // create a new LR iff this operand is a def
|
||||
addInterference(*OpI, &LVSetAI, isCallInst);
|
||||
}
|
||||
|
||||
// Calculate the spill cost of each live range
|
||||
//
|
||||
LiveRange *LR = LRI.getLiveRangeForValue( *OpI );
|
||||
if( LR )
|
||||
LR->addSpillCost(BBLoopDepthCost);
|
||||
LiveRange *LR = LRI.getLiveRangeForValue(*OpI);
|
||||
if (LR) LR->addSpillCost(BBLoopDepthCost);
|
||||
}
|
||||
|
||||
|
||||
@ -372,43 +367,32 @@ void PhyRegAlloc::addInterf4PseudoInstr(const MachineInstr *MInst) {
|
||||
|
||||
// iterate over MI operands to find defs
|
||||
//
|
||||
for( MachineInstr::val_const_op_iterator It1(MInst);!It1.done(); ++It1) {
|
||||
|
||||
const LiveRange *const LROfOp1 = LRI.getLiveRangeForValue( *It1 );
|
||||
for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
|
||||
ItE = MInst->end(); It1 != ItE; ++It1) {
|
||||
const LiveRange *LROfOp1 = LRI.getLiveRangeForValue(*It1);
|
||||
assert((LROfOp1 || !It1.isDef()) && "No LR for Def in PSEUDO insruction");
|
||||
|
||||
if( !LROfOp1 && It1.isDef() )
|
||||
assert( 0 && "No LR for Def in PSEUDO insruction");
|
||||
MachineInstr::const_val_op_iterator It2 = It1;
|
||||
for(++It2; It2 != ItE; ++It2) {
|
||||
const LiveRange *LROfOp2 = LRI.getLiveRangeForValue(*It2);
|
||||
|
||||
MachineInstr::val_const_op_iterator It2 = It1;
|
||||
++It2;
|
||||
|
||||
for( ; !It2.done(); ++It2) {
|
||||
|
||||
const LiveRange *const LROfOp2 = LRI.getLiveRangeForValue( *It2 );
|
||||
|
||||
if( LROfOp2) {
|
||||
|
||||
RegClass *const RCOfOp1 = LROfOp1->getRegClass();
|
||||
RegClass *const RCOfOp2 = LROfOp2->getRegClass();
|
||||
if (LROfOp2) {
|
||||
RegClass *RCOfOp1 = LROfOp1->getRegClass();
|
||||
RegClass *RCOfOp2 = LROfOp2->getRegClass();
|
||||
|
||||
if( RCOfOp1 == RCOfOp2 ){
|
||||
RCOfOp1->setInterference( LROfOp1, LROfOp2 );
|
||||
setInterf = true;
|
||||
}
|
||||
|
||||
} // if Op2 has a LR
|
||||
|
||||
} // for all other defs in machine instr
|
||||
|
||||
} // for all operands in an instruction
|
||||
|
||||
if( !setInterf && (MInst->getNumOperands() > 2) ) {
|
||||
if (!setInterf && MInst->getNumOperands() > 2) {
|
||||
cerr << "\nInterf not set for any operand in pseudo instr:\n";
|
||||
cerr << *MInst;
|
||||
assert(0 && "Interf not set for pseudo instr with > 2 operands" );
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -20,7 +20,6 @@
|
||||
|
||||
#include "SchedPriorities.h"
|
||||
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
|
||||
#include "llvm/Analysis/LiveVar/ValueSet.h"
|
||||
#include "Support/PostOrderIterator.h"
|
||||
#include <iostream>
|
||||
using std::cerr;
|
||||
@ -266,24 +265,25 @@ SchedPriorities::findSetWithMaxDelay(std::vector<candIndex>& mcands,
|
||||
bool
|
||||
SchedPriorities::instructionHasLastUse(MethodLiveVarInfo& methodLiveVarInfo,
|
||||
const SchedGraphNode* graphNode) {
|
||||
const MachineInstr* minstr = graphNode->getMachineInstr();
|
||||
const MachineInstr *MI = graphNode->getMachineInstr();
|
||||
|
||||
std::hash_map<const MachineInstr*, bool>::const_iterator
|
||||
ui = lastUseMap.find(minstr);
|
||||
ui = lastUseMap.find(MI);
|
||||
if (ui != lastUseMap.end())
|
||||
return ui->second;
|
||||
|
||||
// else check if instruction is a last use and save it in the hash_map
|
||||
bool hasLastUse = false;
|
||||
const BasicBlock* bb = graphNode->getBB();
|
||||
const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(minstr, bb);
|
||||
const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(MI, bb);
|
||||
|
||||
for (MachineInstr::val_const_op_iterator vo(minstr); !vo.done(); ++vo)
|
||||
if (!LVs.count(*vo)) {
|
||||
for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end();
|
||||
OI != OE; ++OI)
|
||||
if (!LVs.count(*OI)) {
|
||||
hasLastUse = true;
|
||||
break;
|
||||
}
|
||||
|
||||
return lastUseMap[minstr] = hasLastUse;
|
||||
return lastUseMap[MI] = hasLastUse;
|
||||
}
|
||||
|
||||
|
||||
@ -45,7 +45,8 @@ void BBLiveVar::calcDefUseSets() {
|
||||
}
|
||||
|
||||
// iterate over MI operands to find defs
|
||||
for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI)
|
||||
for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
|
||||
OpI != OpE; ++OpI)
|
||||
if (OpI.isDef()) // add to Defs only if this operand is a def
|
||||
addDef(*OpI);
|
||||
|
||||
@ -57,10 +58,11 @@ void BBLiveVar::calcDefUseSets() {
|
||||
bool IsPhi = MI->getOpCode() == PHI;
|
||||
|
||||
// iterate over MI operands to find uses
|
||||
for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI) {
|
||||
for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
|
||||
OpI != OpE; ++OpI) {
|
||||
const Value *Op = *OpI;
|
||||
|
||||
if (Op->getType()->isLabelType())
|
||||
if (isa<BasicBlock>(Op))
|
||||
continue; // don't process labels
|
||||
|
||||
if (!OpI.isDef()) { // add to Defs only if this operand is a use
|
||||
|
||||
@ -187,7 +187,8 @@ MethodLiveVarInfo::getLiveVarSetAfterMInst(const MachineInstr *MI,
|
||||
// machine instruction operand.
|
||||
//
|
||||
static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
|
||||
for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
|
||||
for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
|
||||
OpE = MInst->end(); OpI != OpE; ++OpI) {
|
||||
if (OpI.isDef()) // kill only if this operand is a def
|
||||
LVS.insert(*OpI); // this definition kills any uses
|
||||
}
|
||||
@ -198,7 +199,8 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
|
||||
LVS.erase(MInst->getImplicitRef(i));
|
||||
}
|
||||
|
||||
for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
|
||||
for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
|
||||
OpE = MInst->end(); OpI != OpE; ++OpI) {
|
||||
if (isa<BasicBlock>(*OpI)) continue; // don't process labels
|
||||
|
||||
if (!OpI.isDef()) // add only if this operand is a use
|
||||
@ -206,7 +208,7 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
|
||||
}
|
||||
|
||||
// do for implicit operands as well
|
||||
for (unsigned i=0; i < MInst->getNumImplicitRefs(); ++i) {
|
||||
for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) {
|
||||
if (!MInst->implicitRefIsDefined(i))
|
||||
LVS.insert(MInst->getImplicitRef(i));
|
||||
}
|
||||
|
||||
@ -7,24 +7,15 @@
|
||||
#include <iostream>
|
||||
using std::cerr;
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// Constructor
|
||||
//---------------------------------------------------------------------------
|
||||
LiveRangeInfo::LiveRangeInfo(const Method *const M,
|
||||
const TargetMachine& tm,
|
||||
LiveRangeInfo::LiveRangeInfo(const Method *M, const TargetMachine &tm,
|
||||
std::vector<RegClass *> &RCL)
|
||||
: Meth(M), TM(tm),
|
||||
RegClassList(RCL), MRI(tm.getRegInfo())
|
||||
{ }
|
||||
: Meth(M), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// Destructor: Deletes all LiveRanges in the LiveRangeMap
|
||||
//---------------------------------------------------------------------------
|
||||
LiveRangeInfo::~LiveRangeInfo() {
|
||||
LiveRangeMapType::iterator MI = LiveRangeMap.begin();
|
||||
for (LiveRangeMapType::iterator MI = LiveRangeMap.begin();
|
||||
MI != LiveRangeMap.end(); ++MI) {
|
||||
|
||||
for( ; MI != LiveRangeMap.end() ; ++MI) {
|
||||
if (MI->first && MI->second) {
|
||||
LiveRange *LR = MI->second;
|
||||
|
||||
@ -33,9 +24,7 @@ LiveRangeInfo::~LiveRangeInfo() {
|
||||
// live range. We have to make the other entries NULL when we delete
|
||||
// a live range.
|
||||
|
||||
LiveRange::iterator LI = LR->begin();
|
||||
|
||||
for( ; LI != LR->end() ; ++LI)
|
||||
for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI)
|
||||
LiveRangeMap[*LI] = 0;
|
||||
|
||||
delete LR;
|
||||
@ -87,10 +76,9 @@ void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
|
||||
// ranges for all values defined in the instruction stream. Also, it
|
||||
// creates live ranges for all incoming arguments of the method.
|
||||
//---------------------------------------------------------------------------
|
||||
void LiveRangeInfo::constructLiveRanges()
|
||||
{
|
||||
void LiveRangeInfo::constructLiveRanges() {
|
||||
|
||||
if( DEBUG_RA)
|
||||
if (DEBUG_RA)
|
||||
cerr << "Consturcting Live Ranges ...\n";
|
||||
|
||||
// first find the live ranges for all incoming args of the method since
|
||||
@ -129,11 +117,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
|
||||
// Now find speical LLVM instructions (CALL, RET) and LRs in machine
|
||||
// instructions.
|
||||
|
||||
|
||||
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
|
||||
for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
|
||||
|
||||
//
|
||||
for (Method::const_iterator BBI = Meth->begin(); BBI != Meth->end(); ++BBI) {
|
||||
// Now find all LRs for machine the instructions. A new LR will be created
|
||||
// only for defs in the machine instr since, we assume that all Values are
|
||||
// defined before they are used. However, there can be multiple defs for
|
||||
@ -141,12 +126,11 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
|
||||
// get the iterator for machine instructions
|
||||
const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
|
||||
MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
|
||||
|
||||
// iterate over all the machine instructions in BB
|
||||
for( ; MInstIterator != MIVec.end(); MInstIterator++) {
|
||||
|
||||
const MachineInstr * MInst = *MInstIterator;
|
||||
for(MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
|
||||
MInstIterator != MIVec.end(); ++MInstIterator) {
|
||||
const MachineInstr *MInst = *MInstIterator;
|
||||
|
||||
// Now if the machine instruction is a call/return instruction,
|
||||
// add it to CallRetInstrList for processing its implicit operands
|
||||
@ -157,7 +141,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
|
||||
|
||||
// iterate over MI operands to find defs
|
||||
for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
|
||||
for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
|
||||
OpE = MInst->end(); OpI != OpE; ++OpI) {
|
||||
if(DEBUG_RA) {
|
||||
MachineOperand::MachineOperandType OpTyp =
|
||||
OpI.getMachineOperand().getOperandType();
|
||||
@ -311,33 +296,27 @@ void LiveRangeInfo::coalesceLRs()
|
||||
|
||||
|
||||
// iterate over MI operands to find defs
|
||||
for(MachineInstr::val_const_op_iterator DefI(MInst);!DefI.done();++DefI){
|
||||
|
||||
if( DefI.isDef() ) { // iff this operand is a def
|
||||
for(MachineInstr::const_val_op_iterator DefI = MInst->begin(),
|
||||
DefE = MInst->end(); DefI != DefE; ++DefI) {
|
||||
if (DefI.isDef()) { // iff this operand is a def
|
||||
LiveRange *LROfDef = getLiveRangeForValue( *DefI );
|
||||
RegClass *RCOfDef = LROfDef->getRegClass();
|
||||
|
||||
LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
|
||||
assert( LROfDef );
|
||||
RegClass *const RCOfDef = LROfDef->getRegClass();
|
||||
|
||||
MachineInstr::val_const_op_iterator UseI(MInst);
|
||||
for( ; !UseI.done(); ++UseI){ // for all uses
|
||||
|
||||
LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
|
||||
|
||||
if( ! LROfUse ) { // if LR of use is not found
|
||||
MachineInstr::const_val_op_iterator UseI = MInst->begin(),
|
||||
UseE = MInst->end();
|
||||
for( ; UseI != UseE; ++UseI){ // for all uses
|
||||
|
||||
LiveRange *LROfUse = getLiveRangeForValue( *UseI );
|
||||
if (!LROfUse) { // if LR of use is not found
|
||||
//don't warn about labels
|
||||
if (!isa<BasicBlock>(*UseI) && DEBUG_RA)
|
||||
cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
|
||||
continue; // ignore and continue
|
||||
}
|
||||
|
||||
if( LROfUse == LROfDef) // nothing to merge if they are same
|
||||
if (LROfUse == LROfDef) // nothing to merge if they are same
|
||||
continue;
|
||||
|
||||
//RegClass *const RCOfUse = LROfUse->getRegClass();
|
||||
//if( RCOfDef == RCOfUse ) { // if the reg classes are the same
|
||||
|
||||
if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
|
||||
|
||||
// If the two RegTypes are the same
|
||||
@ -356,26 +335,17 @@ void LiveRangeInfo::coalesceLRs()
|
||||
unionAndUpdateLRs(LROfDef, LROfUse);
|
||||
}
|
||||
|
||||
|
||||
} // if combined degree is less than # of regs
|
||||
|
||||
} // if def and use do not interfere
|
||||
|
||||
}// if reg classes are the same
|
||||
|
||||
} // for all uses
|
||||
|
||||
} // if def
|
||||
|
||||
} // for all defs
|
||||
|
||||
} // for all machine instructions
|
||||
|
||||
} // for all BBs
|
||||
|
||||
if( DEBUG_RA)
|
||||
if (DEBUG_RA)
|
||||
cerr << "\nCoalscing Done!\n";
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -395,5 +365,3 @@ void LiveRangeInfo::printLiveRanges() {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -15,7 +15,6 @@
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/CodeGen/MachineCodeForMethod.h"
|
||||
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
|
||||
#include "llvm/Analysis/LiveVar/ValueSet.h"
|
||||
#include "llvm/Analysis/LoopInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Target/MachineFrameInfo.h"
|
||||
@ -310,19 +309,15 @@ void PhyRegAlloc::buildInterferenceGraphs()
|
||||
|
||||
// iterate over all MI operands to find defs
|
||||
//
|
||||
for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
|
||||
|
||||
if( OpI.isDef() ) {
|
||||
// create a new LR iff this operand is a def
|
||||
//
|
||||
for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
|
||||
OpE = MInst->end(); OpI != OpE; ++OpI) {
|
||||
if (OpI.isDef()) // create a new LR iff this operand is a def
|
||||
addInterference(*OpI, &LVSetAI, isCallInst);
|
||||
}
|
||||
|
||||
// Calculate the spill cost of each live range
|
||||
//
|
||||
LiveRange *LR = LRI.getLiveRangeForValue( *OpI );
|
||||
if( LR )
|
||||
LR->addSpillCost(BBLoopDepthCost);
|
||||
LiveRange *LR = LRI.getLiveRangeForValue(*OpI);
|
||||
if (LR) LR->addSpillCost(BBLoopDepthCost);
|
||||
}
|
||||
|
||||
|
||||
@ -372,43 +367,32 @@ void PhyRegAlloc::addInterf4PseudoInstr(const MachineInstr *MInst) {
|
||||
|
||||
// iterate over MI operands to find defs
|
||||
//
|
||||
for( MachineInstr::val_const_op_iterator It1(MInst);!It1.done(); ++It1) {
|
||||
|
||||
const LiveRange *const LROfOp1 = LRI.getLiveRangeForValue( *It1 );
|
||||
for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
|
||||
ItE = MInst->end(); It1 != ItE; ++It1) {
|
||||
const LiveRange *LROfOp1 = LRI.getLiveRangeForValue(*It1);
|
||||
assert((LROfOp1 || !It1.isDef()) && "No LR for Def in PSEUDO insruction");
|
||||
|
||||
if( !LROfOp1 && It1.isDef() )
|
||||
assert( 0 && "No LR for Def in PSEUDO insruction");
|
||||
MachineInstr::const_val_op_iterator It2 = It1;
|
||||
for(++It2; It2 != ItE; ++It2) {
|
||||
const LiveRange *LROfOp2 = LRI.getLiveRangeForValue(*It2);
|
||||
|
||||
MachineInstr::val_const_op_iterator It2 = It1;
|
||||
++It2;
|
||||
|
||||
for( ; !It2.done(); ++It2) {
|
||||
|
||||
const LiveRange *const LROfOp2 = LRI.getLiveRangeForValue( *It2 );
|
||||
|
||||
if( LROfOp2) {
|
||||
|
||||
RegClass *const RCOfOp1 = LROfOp1->getRegClass();
|
||||
RegClass *const RCOfOp2 = LROfOp2->getRegClass();
|
||||
if (LROfOp2) {
|
||||
RegClass *RCOfOp1 = LROfOp1->getRegClass();
|
||||
RegClass *RCOfOp2 = LROfOp2->getRegClass();
|
||||
|
||||
if( RCOfOp1 == RCOfOp2 ){
|
||||
RCOfOp1->setInterference( LROfOp1, LROfOp2 );
|
||||
setInterf = true;
|
||||
}
|
||||
|
||||
} // if Op2 has a LR
|
||||
|
||||
} // for all other defs in machine instr
|
||||
|
||||
} // for all operands in an instruction
|
||||
|
||||
if( !setInterf && (MInst->getNumOperands() > 2) ) {
|
||||
if (!setInterf && MInst->getNumOperands() > 2) {
|
||||
cerr << "\nInterf not set for any operand in pseudo instr:\n";
|
||||
cerr << *MInst;
|
||||
assert(0 && "Interf not set for pseudo instr with > 2 operands" );
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -11,7 +11,6 @@
|
||||
#include "llvm/CodeGen/MachineCodeForMethod.h"
|
||||
#include "llvm/CodeGen/PhyRegAlloc.h"
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/Analysis/LiveVar/ValueSet.h"
|
||||
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
|
||||
#include "llvm/iTerminators.h"
|
||||
#include "llvm/iOther.h"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user