Convert operand iterator over to work like an STL iterator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1720 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineInstr.h

@@ -12,8 +12,6 @@
 #include "llvm/Target/MachineInstrInfo.h"
 #include <iterator>
 class Instruction;
-template<class _MI, class _V> class ValOpIterator;
-
 
 //---------------------------------------------------------------------------
 // class MachineOperand 
@@ -88,7 +86,7 @@ public:
   // Accessor methods.  Caller is responsible for checking the
   // operand type before invoking the corresponding accessor.
   // 
-  inline MachineOperandType getOperandType	() const {
+  inline MachineOperandType getOperandType() const {
     return opType;
   }
   inline Value*		getVRegValue	() const {
@@ -124,9 +122,6 @@ private:
   void			InitializeReg	(int regNum);
 
   friend class MachineInstr;
-  friend class ValOpIterator<const MachineInstr, const Value>;
-  friend class ValOpIterator<      MachineInstr,       Value>;
-
 
 public:
 
@@ -237,17 +232,12 @@ MachineOperand::InitializeReg(int _regNum)
 //---------------------------------------------------------------------------
 
 class MachineInstr : public NonCopyable {
-private:
   MachineOpCode         opCode;
   OpCodeMask            opCodeMask;	// extra bits for variants of an opcode
   std::vector<MachineOperand> operands;
   std::vector<Value*>   implicitRefs;   // values implicitly referenced by this
   std::vector<bool>     implicitIsDef;  // machine instruction (eg, call args)
   
-public:
-  typedef ValOpIterator<const MachineInstr, const Value> val_const_op_iterator;
-  typedef ValOpIterator<const MachineInstr,       Value> val_op_iterator;
-  
 public:
   /*ctor*/		MachineInstr	(MachineOpCode _opCode,
 					 OpCodeMask    _opCodeMask = 0x0);
@@ -262,50 +252,113 @@ public:
   // 
   unsigned int		getNumOperands	() const { return operands.size(); }
   
-  bool			operandIsDefined(unsigned int i) const;
+  bool			operandIsDefined(unsigned i) const;
   
-  const MachineOperand& getOperand	(unsigned int i) const;
+  const MachineOperand& getOperand	(unsigned i) const;
-        MachineOperand& getOperand	(unsigned int i);
+        MachineOperand& getOperand	(unsigned i);
   
   //
   // Information about implicit operands of the instruction
   // 
-  unsigned int		getNumImplicitRefs() const{return implicitRefs.size();}
+  unsigned             	getNumImplicitRefs() const{return implicitRefs.size();}
   
-  bool			implicitRefIsDefined(unsigned int i) const;
+  bool			implicitRefIsDefined(unsigned i) const;
   
-  const Value*          getImplicitRef  (unsigned int i) const;
+  const Value*          getImplicitRef  (unsigned i) const;
-        Value*          getImplicitRef  (unsigned int i);
+        Value*          getImplicitRef  (unsigned i);
   
   //
   // Debugging support
   // 
   void			dump		(unsigned int indent = 0) const;
-
-  
-public:
   friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
-  friend class val_const_op_iterator;
-  friend class val_op_iterator;
 
-public:
+
+  //
+  // Define iterators to access the Value operands of the Machine Instruction.
+  // begin() and end() are defined to produce these iterators...
+  //
+  template<class _MI, class _V> class ValOpIterator;
+  typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
+  typedef ValOpIterator<      MachineInstr*,      Value*> val_op_iterator;
+
+
   // Access to set the operands when building the machine instruction
-  void			SetMachineOperand(unsigned int i,
+  void			SetMachineOperand(unsigned i,
 			      MachineOperand::MachineOperandType operandType,
 			      Value* _val, bool isDef=false);
-  void			SetMachineOperand(unsigned int i,
+  void			SetMachineOperand(unsigned i,
 			      MachineOperand::MachineOperandType operandType,
 			      int64_t intValue, bool isDef=false);
-  void			SetMachineOperand(unsigned int i,
+  void			SetMachineOperand(unsigned i,
 					  int regNum, 
 					  bool isDef=false);
 
   void                  addImplicitRef	 (Value* val, 
                                           bool isDef=false);
   
-  void                  setImplicitRef	 (unsigned int i,
+  void                  setImplicitRef	 (unsigned i,
                                           Value* val, 
                                           bool isDef=false);
+
+  template<class MITy, class VTy>
+  class ValOpIterator : public std::forward_iterator<VTy, ptrdiff_t> {
+    unsigned i;
+    MITy MI;
+    
+    inline void skipToNextVal() {
+      while (i < MI->getNumOperands() &&
+             !((MI->getOperand(i).getOperandType() == MachineOperand::MO_VirtualRegister ||
+                MI->getOperand(i).getOperandType() == MachineOperand::MO_CCRegister)
+               && MI->getOperand(i).getVRegValue() != 0))
+        ++i;
+    }
+  
+    inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
+      skipToNextVal();
+    }
+  
+  public:
+    typedef ValOpIterator<MITy, VTy> _Self;
+    
+    inline VTy operator*() const { return MI->getOperand(i).getVRegValue(); }
+
+    const MachineOperand &getMachineOperand() const {
+      return MI->getOperand(i);
+    }
+
+    inline VTy operator->() const { return operator*(); }
+    
+    inline bool isDef() const { return MI->getOperand(i).opIsDef(); } 
+    
+    inline _Self& operator++() { i++; skipToNextVal(); return *this; }
+    inline _Self  operator++(int) { _Self tmp = *this; ++*this; return tmp; }
+
+    inline bool operator==(const _Self &y) const { 
+      return i == y.i;
+    }
+    inline bool operator!=(const _Self &y) const { 
+      return !operator==(y);
+    }
+
+    static _Self begin(MITy MI) {
+      return _Self(MI, 0);
+    }
+    static _Self end(MITy MI) {
+      return _Self(MI, MI->getNumOperands());
+    }
+  };
+
+  // define begin() and end()
+  val_op_iterator begin() { return val_op_iterator::begin(this); }
+  val_op_iterator end()   { return val_op_iterator::end(this); }
+
+  const_val_op_iterator begin() const {
+    return const_val_op_iterator::begin(this);
+  }
+  const_val_op_iterator end() const {
+    return const_val_op_iterator::end(this);
+  }
 };
 
 
@@ -369,43 +422,6 @@ MachineInstr::setImplicitRef(unsigned int i,
 }
 
 
-template<class _MI, class _V>
-class ValOpIterator : public std::forward_iterator<_V, ptrdiff_t> {
-private:
-  unsigned int i;
-  int resultPos;
-  _MI* minstr;
-  
-  inline void	skipToNextVal() {
-    while (i < minstr->getNumOperands() &&
-	   ! ((minstr->operands[i].opType == MachineOperand::MO_VirtualRegister
-	       || minstr->operands[i].opType == MachineOperand::MO_CCRegister)
-	      && minstr->operands[i].value != NULL))
-      ++i;
-  }
-  
-public:
-  typedef ValOpIterator<_MI, _V> _Self;
-  
-  inline ValOpIterator(_MI* _minstr) : i(0), minstr(_minstr) {
-    resultPos = TargetInstrDescriptors[minstr->opCode].resultPos;
-    skipToNextVal();
-  };
-  
-  inline _V*	operator*()  const { return minstr->getOperand(i).getVRegValue();}
-
-  const MachineOperand & getMachineOperand() const { return minstr->getOperand(i);  }
-
-  inline _V*	operator->() const { return operator*(); }
-  //  inline bool	isDef	()   const { return (((int) i) == resultPos); }
-  
-  inline bool	isDef	()   const { return minstr->getOperand(i).isDef; } 
-  inline bool	done	()   const { return (i == minstr->getNumOperands()); }
-  
-  inline _Self& operator++()	   { i++; skipToNextVal(); return *this; }
-  inline _Self  operator++(int)	   { _Self tmp = *this; ++*this; return tmp; }
-};
-
 
 //---------------------------------------------------------------------------
 // class MachineCodeForBasicBlock

lib/Analysis/LiveVar/BBLiveVar.cpp

@@ -45,7 +45,8 @@ void BBLiveVar::calcDefUseSets() {
     }
 
     // iterate over  MI operands to find defs
-    for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI)
+    for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
+         OpI != OpE; ++OpI)
       if (OpI.isDef())      // add to Defs only if this operand is a def
 	addDef(*OpI);
 
@@ -57,10 +58,11 @@ void BBLiveVar::calcDefUseSets() {
     bool IsPhi = MI->getOpCode() == PHI;
  
     // iterate over MI operands to find uses
-    for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI) {
+    for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
+         OpI != OpE; ++OpI) {
       const Value *Op = *OpI;
 
-      if (Op->getType()->isLabelType())    
+      if (isa<BasicBlock>(Op))
 	continue;             // don't process labels
 
       if (!OpI.isDef()) {   // add to Defs only if this operand is a use

lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp

@@ -187,7 +187,8 @@ MethodLiveVarInfo::getLiveVarSetAfterMInst(const MachineInstr *MI,
 // machine instruction operand.
 //
 static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
-  for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+  for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+         OpE = MInst->end(); OpI != OpE; ++OpI) {
     if (OpI.isDef())           // kill only if this operand is a def
       LVS.insert(*OpI);        // this definition kills any uses
   }
@@ -198,7 +199,8 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
       LVS.erase(MInst->getImplicitRef(i));
   }
 
-  for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+  for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+         OpE = MInst->end(); OpI != OpE; ++OpI) {
     if (isa<BasicBlock>(*OpI)) continue; // don't process labels
     
     if (!OpI.isDef())      // add only if this operand is a use
@@ -206,7 +208,7 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
   }
 
   // do for implicit operands as well
-  for (unsigned i=0; i < MInst->getNumImplicitRefs(); ++i) {
+  for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) {
     if (!MInst->implicitRefIsDefined(i))
       LVS.insert(MInst->getImplicitRef(i));
   }

lib/CodeGen/InstrSched/SchedPriorities.cpp

@@ -20,7 +20,6 @@
 
 #include "SchedPriorities.h"
 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "Support/PostOrderIterator.h"
 #include <iostream>
 using std::cerr;
@@ -266,24 +265,25 @@ SchedPriorities::findSetWithMaxDelay(std::vector<candIndex>& mcands,
 bool
 SchedPriorities::instructionHasLastUse(MethodLiveVarInfo& methodLiveVarInfo,
 				       const SchedGraphNode* graphNode) {
-  const MachineInstr* minstr = graphNode->getMachineInstr();
+  const MachineInstr *MI = graphNode->getMachineInstr();
   
   std::hash_map<const MachineInstr*, bool>::const_iterator
-    ui = lastUseMap.find(minstr);
+    ui = lastUseMap.find(MI);
   if (ui != lastUseMap.end())
     return ui->second;
   
   // else check if instruction is a last use and save it in the hash_map
   bool hasLastUse = false;
   const BasicBlock* bb = graphNode->getBB();
-  const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(minstr, bb);
+  const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(MI, bb);
   
-  for (MachineInstr::val_const_op_iterator vo(minstr); !vo.done(); ++vo)
+  for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end();
-    if (!LVs.count(*vo)) {
+       OI != OE; ++OI)
+    if (!LVs.count(*OI)) {
       hasLastUse = true;
       break;
     }
 
-  return lastUseMap[minstr] = hasLastUse;
+  return lastUseMap[MI] = hasLastUse;
 }
 

lib/CodeGen/RegAlloc/LiveRangeInfo.cpp

@@ -7,24 +7,15 @@
 #include <iostream>
 using std::cerr;
 
-//---------------------------------------------------------------------------
+LiveRangeInfo::LiveRangeInfo(const Method *M, const TargetMachine &tm,
-// Constructor
-//---------------------------------------------------------------------------
-LiveRangeInfo::LiveRangeInfo(const Method *const M, 
-			     const TargetMachine& tm,
 			     std::vector<RegClass *> &RCL)
-                             : Meth(M), TM(tm),
+  : Meth(M), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
-                               RegClassList(RCL), MRI(tm.getRegInfo())
-{ }
 
 
-//---------------------------------------------------------------------------
-// Destructor: Deletes all LiveRanges in the LiveRangeMap
-//---------------------------------------------------------------------------
 LiveRangeInfo::~LiveRangeInfo() {
-  LiveRangeMapType::iterator MI =  LiveRangeMap.begin(); 
+  for (LiveRangeMapType::iterator MI = LiveRangeMap.begin(); 
+       MI != LiveRangeMap.end(); ++MI) {  
 
-  for( ; MI != LiveRangeMap.end() ; ++MI) {  
     if (MI->first && MI->second) {
       LiveRange *LR = MI->second;
 
@@ -33,9 +24,7 @@ LiveRangeInfo::~LiveRangeInfo() {
       // live range. We have to make the other entries NULL when we delete
       // a live range.
 
-      LiveRange::iterator LI = LR->begin();
+      for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI)
-      
-      for( ; LI != LR->end() ; ++LI)
         LiveRangeMap[*LI] = 0;
       
       delete LR;
@@ -87,10 +76,9 @@ void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
 // ranges for all values defined in the instruction stream. Also, it
 // creates live ranges for all incoming arguments of the method.
 //---------------------------------------------------------------------------
-void LiveRangeInfo::constructLiveRanges()
+void LiveRangeInfo::constructLiveRanges() {  
-{  
 
-  if( DEBUG_RA) 
+  if (DEBUG_RA) 
     cerr << "Consturcting Live Ranges ...\n";
 
   // first find the live ranges for all incoming args of the method since
@@ -129,11 +117,8 @@ void LiveRangeInfo::constructLiveRanges()
 
   // Now find speical LLVM instructions (CALL, RET) and LRs in machine
   // instructions.
-
+  //
-
+  for (Method::const_iterator BBI = Meth->begin(); BBI != Meth->end(); ++BBI) {
-  Method::const_iterator BBI = Meth->begin();    // random iterator for BBs   
-  for( ; BBI != Meth->end(); ++BBI) {            // go thru BBs in random order
-
     // Now find all LRs for machine the instructions. A new LR will be created 
     // only for defs in the machine instr since, we assume that all Values are
     // defined before they are used. However, there can be multiple defs for
@@ -141,12 +126,11 @@ void LiveRangeInfo::constructLiveRanges()
 
     // get the iterator for machine instructions
     const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
-    MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
 
     // iterate over all the machine instructions in BB
-    for( ; MInstIterator != MIVec.end(); MInstIterator++) {  
+    for(MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
-      
+        MInstIterator != MIVec.end(); ++MInstIterator) {  
-      const MachineInstr * MInst = *MInstIterator; 
+      const MachineInstr *MInst = *MInstIterator; 
 
       // Now if the machine instruction is a  call/return instruction,
       // add it to CallRetInstrList for processing its implicit operands
@@ -157,7 +141,8 @@ void LiveRangeInfo::constructLiveRanges()
  
              
       // iterate over  MI operands to find defs
-      for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+      for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+             OpE = MInst->end(); OpI != OpE; ++OpI) {
 	if(DEBUG_RA) {
 	  MachineOperand::MachineOperandType OpTyp = 
 	    OpI.getMachineOperand().getOperandType();
@@ -311,33 +296,27 @@ void LiveRangeInfo::coalesceLRs()
 
 
       // iterate over  MI operands to find defs
-      for(MachineInstr::val_const_op_iterator DefI(MInst);!DefI.done();++DefI){
+      for(MachineInstr::const_val_op_iterator DefI = MInst->begin(),
-	
+            DefE = MInst->end(); DefI != DefE; ++DefI) {
-	if( DefI.isDef() ) {            // iff this operand is a def
+	if (DefI.isDef()) {            // iff this operand is a def
+	  LiveRange *LROfDef = getLiveRangeForValue( *DefI );
+	  RegClass *RCOfDef = LROfDef->getRegClass();
 
-	  LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
+	  MachineInstr::const_val_op_iterator UseI = MInst->begin(),
-	  assert( LROfDef );
+            UseE = MInst->end();
-	  RegClass *const RCOfDef = LROfDef->getRegClass();
+	  for( ; UseI != UseE; ++UseI){ // for all uses
-
-	  MachineInstr::val_const_op_iterator UseI(MInst);
-	  for( ; !UseI.done(); ++UseI){ // for all uses
-
- 	    LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
-
-	    if( ! LROfUse ) {           // if LR of use is not found
 
+ 	    LiveRange *LROfUse = getLiveRangeForValue( *UseI );
+	    if (!LROfUse) {             // if LR of use is not found
 	      //don't warn about labels
 	      if (!isa<BasicBlock>(*UseI) && DEBUG_RA)
 		cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
 	      continue;                 // ignore and continue
 	    }
 
-	    if( LROfUse == LROfDef)     // nothing to merge if they are same
+	    if (LROfUse == LROfDef)     // nothing to merge if they are same
 	      continue;
 
-	    //RegClass *const RCOfUse = LROfUse->getRegClass();
-	    //if( RCOfDef == RCOfUse ) {  // if the reg classes are the same
-
 	    if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
 
 	      // If the two RegTypes are the same
@@ -356,26 +335,17 @@ void LiveRangeInfo::coalesceLRs()
 		    unionAndUpdateLRs(LROfDef, LROfUse);
 		  }
 
-
 		} // if combined degree is less than # of regs
-
 	      } // if def and use do not interfere
-
 	    }// if reg classes are the same
-
 	  } // for all uses
-
 	} // if def
-
       } // for all defs
-
     } // for all machine instructions
-
   } // for all BBs
 
-  if( DEBUG_RA) 
+  if (DEBUG_RA) 
     cerr << "\nCoalscing Done!\n";
-
 }
 
 
@@ -395,5 +365,3 @@ void LiveRangeInfo::printLiveRanges() {
     }
   }
 }
-
-

lib/CodeGen/RegAlloc/PhyRegAlloc.cpp

@@ -15,7 +15,6 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForMethod.h"
 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineFrameInfo.h"
@@ -310,19 +309,15 @@ void PhyRegAlloc::buildInterferenceGraphs()
 
       // iterate over all MI operands to find defs
       //
-      for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
+      for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
-
+             OpE = MInst->end(); OpI != OpE; ++OpI) {
-       	if( OpI.isDef() ) {     
+       	if (OpI.isDef())    // create a new LR iff this operand is a def
-	  // create a new LR iff this operand is a def
-	  //
 	  addInterference(*OpI, &LVSetAI, isCallInst);
-	} 
 
 	// Calculate the spill cost of each live range
 	//
-	LiveRange *LR = LRI.getLiveRangeForValue( *OpI );
+	LiveRange *LR = LRI.getLiveRangeForValue(*OpI);
-	if( LR )
+	if (LR) LR->addSpillCost(BBLoopDepthCost);
-	  LR->addSpillCost(BBLoopDepthCost);
       } 
 
 
@@ -372,43 +367,32 @@ void PhyRegAlloc::addInterf4PseudoInstr(const MachineInstr *MInst) {
 
   // iterate over  MI operands to find defs
   //
-  for( MachineInstr::val_const_op_iterator It1(MInst);!It1.done(); ++It1) {
+  for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
-    
+         ItE = MInst->end(); It1 != ItE; ++It1) {
-    const LiveRange *const LROfOp1 = LRI.getLiveRangeForValue( *It1 ); 
+    const LiveRange *LROfOp1 = LRI.getLiveRangeForValue(*It1); 
+    assert((LROfOp1 || !It1.isDef()) && "No LR for Def in PSEUDO insruction");
 
-    if( !LROfOp1 && It1.isDef() )
+    MachineInstr::const_val_op_iterator It2 = It1;
-      assert( 0 && "No LR for Def in PSEUDO insruction");
+    for(++It2; It2 != ItE; ++It2) {
+      const LiveRange *LROfOp2 = LRI.getLiveRangeForValue(*It2); 
 
-    MachineInstr::val_const_op_iterator It2 = It1;
+      if (LROfOp2) {
-    ++It2;
+	RegClass *RCOfOp1 = LROfOp1->getRegClass(); 
-	
+	RegClass *RCOfOp2 = LROfOp2->getRegClass(); 
-    for(  ; !It2.done(); ++It2) {
-
-      const LiveRange *const LROfOp2 = LRI.getLiveRangeForValue( *It2 ); 
-
-      if( LROfOp2) {
-	    
-	RegClass *const RCOfOp1 = LROfOp1->getRegClass(); 
-	RegClass *const RCOfOp2 = LROfOp2->getRegClass(); 
  
 	if( RCOfOp1 == RCOfOp2 ){ 
 	  RCOfOp1->setInterference( LROfOp1, LROfOp2 );  
 	  setInterf = true;
 	}
-
       } // if Op2 has a LR
-
     } // for all other defs in machine instr
-
   } // for all operands in an instruction
 
-  if( !setInterf && (MInst->getNumOperands() > 2) ) {
+  if (!setInterf && MInst->getNumOperands() > 2) {
     cerr << "\nInterf not set for any operand in pseudo instr:\n";
     cerr << *MInst;
     assert(0 && "Interf not set for pseudo instr with > 2 operands" );
-    
   }
-
 } 
 
 

lib/Target/SparcV9/InstrSched/SchedPriorities.cpp

@@ -20,7 +20,6 @@
 
 #include "SchedPriorities.h"
 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "Support/PostOrderIterator.h"
 #include <iostream>
 using std::cerr;
@@ -266,24 +265,25 @@ SchedPriorities::findSetWithMaxDelay(std::vector<candIndex>& mcands,
 bool
 SchedPriorities::instructionHasLastUse(MethodLiveVarInfo& methodLiveVarInfo,
 				       const SchedGraphNode* graphNode) {
-  const MachineInstr* minstr = graphNode->getMachineInstr();
+  const MachineInstr *MI = graphNode->getMachineInstr();
   
   std::hash_map<const MachineInstr*, bool>::const_iterator
-    ui = lastUseMap.find(minstr);
+    ui = lastUseMap.find(MI);
   if (ui != lastUseMap.end())
     return ui->second;
   
   // else check if instruction is a last use and save it in the hash_map
   bool hasLastUse = false;
   const BasicBlock* bb = graphNode->getBB();
-  const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(minstr, bb);
+  const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(MI, bb);
   
-  for (MachineInstr::val_const_op_iterator vo(minstr); !vo.done(); ++vo)
+  for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end();
-    if (!LVs.count(*vo)) {
+       OI != OE; ++OI)
+    if (!LVs.count(*OI)) {
       hasLastUse = true;
       break;
     }
 
-  return lastUseMap[minstr] = hasLastUse;
+  return lastUseMap[MI] = hasLastUse;
 }
 

lib/Target/SparcV9/LiveVar/BBLiveVar.cpp

@@ -45,7 +45,8 @@ void BBLiveVar::calcDefUseSets() {
     }
 
     // iterate over  MI operands to find defs
-    for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI)
+    for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
+         OpI != OpE; ++OpI)
       if (OpI.isDef())      // add to Defs only if this operand is a def
 	addDef(*OpI);
 
@@ -57,10 +58,11 @@ void BBLiveVar::calcDefUseSets() {
     bool IsPhi = MI->getOpCode() == PHI;
  
     // iterate over MI operands to find uses
-    for (MachineInstr::val_const_op_iterator OpI(MI); !OpI.done(); ++OpI) {
+    for (MachineInstr::const_val_op_iterator OpI = MI->begin(), OpE = MI->end();
+         OpI != OpE; ++OpI) {
       const Value *Op = *OpI;
 
-      if (Op->getType()->isLabelType())    
+      if (isa<BasicBlock>(Op))
 	continue;             // don't process labels
 
       if (!OpI.isDef()) {   // add to Defs only if this operand is a use

lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp

@@ -187,7 +187,8 @@ MethodLiveVarInfo::getLiveVarSetAfterMInst(const MachineInstr *MI,
 // machine instruction operand.
 //
 static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
-  for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+  for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+         OpE = MInst->end(); OpI != OpE; ++OpI) {
     if (OpI.isDef())           // kill only if this operand is a def
       LVS.insert(*OpI);        // this definition kills any uses
   }
@@ -198,7 +199,8 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
       LVS.erase(MInst->getImplicitRef(i));
   }
 
-  for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+  for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+         OpE = MInst->end(); OpI != OpE; ++OpI) {
     if (isa<BasicBlock>(*OpI)) continue; // don't process labels
     
     if (!OpI.isDef())      // add only if this operand is a use
@@ -206,7 +208,7 @@ static void applyTranferFuncForMInst(ValueSet &LVS, const MachineInstr *MInst) {
   }
 
   // do for implicit operands as well
-  for (unsigned i=0; i < MInst->getNumImplicitRefs(); ++i) {
+  for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) {
     if (!MInst->implicitRefIsDefined(i))
       LVS.insert(MInst->getImplicitRef(i));
   }

lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp

@@ -7,24 +7,15 @@
 #include <iostream>
 using std::cerr;
 
-//---------------------------------------------------------------------------
+LiveRangeInfo::LiveRangeInfo(const Method *M, const TargetMachine &tm,
-// Constructor
-//---------------------------------------------------------------------------
-LiveRangeInfo::LiveRangeInfo(const Method *const M, 
-			     const TargetMachine& tm,
 			     std::vector<RegClass *> &RCL)
-                             : Meth(M), TM(tm),
+  : Meth(M), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
-                               RegClassList(RCL), MRI(tm.getRegInfo())
-{ }
 
 
-//---------------------------------------------------------------------------
-// Destructor: Deletes all LiveRanges in the LiveRangeMap
-//---------------------------------------------------------------------------
 LiveRangeInfo::~LiveRangeInfo() {
-  LiveRangeMapType::iterator MI =  LiveRangeMap.begin(); 
+  for (LiveRangeMapType::iterator MI = LiveRangeMap.begin(); 
+       MI != LiveRangeMap.end(); ++MI) {  
 
-  for( ; MI != LiveRangeMap.end() ; ++MI) {  
     if (MI->first && MI->second) {
       LiveRange *LR = MI->second;
 
@@ -33,9 +24,7 @@ LiveRangeInfo::~LiveRangeInfo() {
       // live range. We have to make the other entries NULL when we delete
       // a live range.
 
-      LiveRange::iterator LI = LR->begin();
+      for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI)
-      
-      for( ; LI != LR->end() ; ++LI)
         LiveRangeMap[*LI] = 0;
       
       delete LR;
@@ -87,10 +76,9 @@ void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
 // ranges for all values defined in the instruction stream. Also, it
 // creates live ranges for all incoming arguments of the method.
 //---------------------------------------------------------------------------
-void LiveRangeInfo::constructLiveRanges()
+void LiveRangeInfo::constructLiveRanges() {  
-{  
 
-  if( DEBUG_RA) 
+  if (DEBUG_RA) 
     cerr << "Consturcting Live Ranges ...\n";
 
   // first find the live ranges for all incoming args of the method since
@@ -129,11 +117,8 @@ void LiveRangeInfo::constructLiveRanges()
 
   // Now find speical LLVM instructions (CALL, RET) and LRs in machine
   // instructions.
-
+  //
-
+  for (Method::const_iterator BBI = Meth->begin(); BBI != Meth->end(); ++BBI) {
-  Method::const_iterator BBI = Meth->begin();    // random iterator for BBs   
-  for( ; BBI != Meth->end(); ++BBI) {            // go thru BBs in random order
-
     // Now find all LRs for machine the instructions. A new LR will be created 
     // only for defs in the machine instr since, we assume that all Values are
     // defined before they are used. However, there can be multiple defs for
@@ -141,12 +126,11 @@ void LiveRangeInfo::constructLiveRanges()
 
     // get the iterator for machine instructions
     const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
-    MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
 
     // iterate over all the machine instructions in BB
-    for( ; MInstIterator != MIVec.end(); MInstIterator++) {  
+    for(MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
-      
+        MInstIterator != MIVec.end(); ++MInstIterator) {  
-      const MachineInstr * MInst = *MInstIterator; 
+      const MachineInstr *MInst = *MInstIterator; 
 
       // Now if the machine instruction is a  call/return instruction,
       // add it to CallRetInstrList for processing its implicit operands
@@ -157,7 +141,8 @@ void LiveRangeInfo::constructLiveRanges()
  
              
       // iterate over  MI operands to find defs
-      for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+      for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+             OpE = MInst->end(); OpI != OpE; ++OpI) {
 	if(DEBUG_RA) {
 	  MachineOperand::MachineOperandType OpTyp = 
 	    OpI.getMachineOperand().getOperandType();
@@ -311,33 +296,27 @@ void LiveRangeInfo::coalesceLRs()
 
 
       // iterate over  MI operands to find defs
-      for(MachineInstr::val_const_op_iterator DefI(MInst);!DefI.done();++DefI){
+      for(MachineInstr::const_val_op_iterator DefI = MInst->begin(),
-	
+            DefE = MInst->end(); DefI != DefE; ++DefI) {
-	if( DefI.isDef() ) {            // iff this operand is a def
+	if (DefI.isDef()) {            // iff this operand is a def
+	  LiveRange *LROfDef = getLiveRangeForValue( *DefI );
+	  RegClass *RCOfDef = LROfDef->getRegClass();
 
-	  LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
+	  MachineInstr::const_val_op_iterator UseI = MInst->begin(),
-	  assert( LROfDef );
+            UseE = MInst->end();
-	  RegClass *const RCOfDef = LROfDef->getRegClass();
+	  for( ; UseI != UseE; ++UseI){ // for all uses
-
-	  MachineInstr::val_const_op_iterator UseI(MInst);
-	  for( ; !UseI.done(); ++UseI){ // for all uses
-
- 	    LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
-
-	    if( ! LROfUse ) {           // if LR of use is not found
 
+ 	    LiveRange *LROfUse = getLiveRangeForValue( *UseI );
+	    if (!LROfUse) {             // if LR of use is not found
 	      //don't warn about labels
 	      if (!isa<BasicBlock>(*UseI) && DEBUG_RA)
 		cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
 	      continue;                 // ignore and continue
 	    }
 
-	    if( LROfUse == LROfDef)     // nothing to merge if they are same
+	    if (LROfUse == LROfDef)     // nothing to merge if they are same
 	      continue;
 
-	    //RegClass *const RCOfUse = LROfUse->getRegClass();
-	    //if( RCOfDef == RCOfUse ) {  // if the reg classes are the same
-
 	    if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
 
 	      // If the two RegTypes are the same
@@ -356,26 +335,17 @@ void LiveRangeInfo::coalesceLRs()
 		    unionAndUpdateLRs(LROfDef, LROfUse);
 		  }
 
-
 		} // if combined degree is less than # of regs
-
 	      } // if def and use do not interfere
-
 	    }// if reg classes are the same
-
 	  } // for all uses
-
 	} // if def
-
       } // for all defs
-
     } // for all machine instructions
-
   } // for all BBs
 
-  if( DEBUG_RA) 
+  if (DEBUG_RA) 
     cerr << "\nCoalscing Done!\n";
-
 }
 
 
@@ -395,5 +365,3 @@ void LiveRangeInfo::printLiveRanges() {
     }
   }
 }
-
-

lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp

@@ -15,7 +15,6 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForMethod.h"
 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineFrameInfo.h"
@@ -310,19 +309,15 @@ void PhyRegAlloc::buildInterferenceGraphs()
 
       // iterate over all MI operands to find defs
       //
-      for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
+      for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
-
+             OpE = MInst->end(); OpI != OpE; ++OpI) {
-       	if( OpI.isDef() ) {     
+       	if (OpI.isDef())    // create a new LR iff this operand is a def
-	  // create a new LR iff this operand is a def
-	  //
 	  addInterference(*OpI, &LVSetAI, isCallInst);
-	} 
 
 	// Calculate the spill cost of each live range
 	//
-	LiveRange *LR = LRI.getLiveRangeForValue( *OpI );
+	LiveRange *LR = LRI.getLiveRangeForValue(*OpI);
-	if( LR )
+	if (LR) LR->addSpillCost(BBLoopDepthCost);
-	  LR->addSpillCost(BBLoopDepthCost);
       } 
 
 
@@ -372,43 +367,32 @@ void PhyRegAlloc::addInterf4PseudoInstr(const MachineInstr *MInst) {
 
   // iterate over  MI operands to find defs
   //
-  for( MachineInstr::val_const_op_iterator It1(MInst);!It1.done(); ++It1) {
+  for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
-    
+         ItE = MInst->end(); It1 != ItE; ++It1) {
-    const LiveRange *const LROfOp1 = LRI.getLiveRangeForValue( *It1 ); 
+    const LiveRange *LROfOp1 = LRI.getLiveRangeForValue(*It1); 
+    assert((LROfOp1 || !It1.isDef()) && "No LR for Def in PSEUDO insruction");
 
-    if( !LROfOp1 && It1.isDef() )
+    MachineInstr::const_val_op_iterator It2 = It1;
-      assert( 0 && "No LR for Def in PSEUDO insruction");
+    for(++It2; It2 != ItE; ++It2) {
+      const LiveRange *LROfOp2 = LRI.getLiveRangeForValue(*It2); 
 
-    MachineInstr::val_const_op_iterator It2 = It1;
+      if (LROfOp2) {
-    ++It2;
+	RegClass *RCOfOp1 = LROfOp1->getRegClass(); 
-	
+	RegClass *RCOfOp2 = LROfOp2->getRegClass(); 
-    for(  ; !It2.done(); ++It2) {
-
-      const LiveRange *const LROfOp2 = LRI.getLiveRangeForValue( *It2 ); 
-
-      if( LROfOp2) {
-	    
-	RegClass *const RCOfOp1 = LROfOp1->getRegClass(); 
-	RegClass *const RCOfOp2 = LROfOp2->getRegClass(); 
  
 	if( RCOfOp1 == RCOfOp2 ){ 
 	  RCOfOp1->setInterference( LROfOp1, LROfOp2 );  
 	  setInterf = true;
 	}
-
       } // if Op2 has a LR
-
     } // for all other defs in machine instr
-
   } // for all operands in an instruction
 
-  if( !setInterf && (MInst->getNumOperands() > 2) ) {
+  if (!setInterf && MInst->getNumOperands() > 2) {
     cerr << "\nInterf not set for any operand in pseudo instr:\n";
     cerr << *MInst;
     assert(0 && "Interf not set for pseudo instr with > 2 operands" );
-    
   }
-
 } 
 
 

lib/Target/SparcV9/SparcV9RegInfo.cpp

@@ -11,7 +11,6 @@
 #include "llvm/CodeGen/MachineCodeForMethod.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"