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Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211689 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -457,7 +457,7 @@ unsigned MachineFunction::addLiveIn(unsigned PReg,
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/// getJTISymbol - Return the MCSymbol for the specified non-empty jump table.
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/// If isLinkerPrivate is specified, an 'l' label is returned, otherwise a
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/// normal 'L' label is returned.
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MCSymbol *MachineFunction::getJTISymbol(unsigned JTI, MCContext &Ctx,
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MCSymbol *MachineFunction::getJTISymbol(unsigned JTI, MCContext &Ctx,
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bool isLinkerPrivate) const {
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const DataLayout *DL = getTarget().getDataLayout();
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assert(JumpTableInfo && "No jump tables");
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@ -530,10 +530,9 @@ int MachineFrameInfo::CreateStackObject(uint64_t Size, unsigned Alignment,
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///
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int MachineFrameInfo::CreateSpillStackObject(uint64_t Size,
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unsigned Alignment) {
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Alignment =
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clampStackAlignment(!getFrameLowering()->isStackRealignable() ||
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!RealignOption,
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Alignment, getFrameLowering()->getStackAlignment());
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Alignment = clampStackAlignment(
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!getFrameLowering()->isStackRealignable() || !RealignOption, Alignment,
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getFrameLowering()->getStackAlignment());
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CreateStackObject(Size, Alignment, true);
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int Index = (int)Objects.size() - NumFixedObjects - 1;
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ensureMaxAlignment(Alignment);
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@ -548,10 +547,9 @@ int MachineFrameInfo::CreateSpillStackObject(uint64_t Size,
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int MachineFrameInfo::CreateVariableSizedObject(unsigned Alignment,
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const AllocaInst *Alloca) {
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HasVarSizedObjects = true;
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Alignment =
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clampStackAlignment(!getFrameLowering()->isStackRealignable() ||
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!RealignOption,
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Alignment, getFrameLowering()->getStackAlignment());
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Alignment = clampStackAlignment(
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!getFrameLowering()->isStackRealignable() || !RealignOption, Alignment,
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getFrameLowering()->getStackAlignment());
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Objects.push_back(StackObject(0, Alignment, 0, false, false, Alloca));
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ensureMaxAlignment(Alignment);
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return (int)Objects.size()-NumFixedObjects-1;
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@ -571,10 +569,9 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
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// object is 16-byte aligned.
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unsigned StackAlign = getFrameLowering()->getStackAlignment();
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unsigned Align = MinAlign(SPOffset, StackAlign);
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Align =
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clampStackAlignment(!getFrameLowering()->isStackRealignable() ||
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!RealignOption,
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Align, getFrameLowering()->getStackAlignment());
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Align = clampStackAlignment(!getFrameLowering()->isStackRealignable() ||
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!RealignOption,
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Align, getFrameLowering()->getStackAlignment());
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Objects.insert(Objects.begin(), StackObject(Size, Align, SPOffset, Immutable,
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/*isSS*/ false,
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/*Alloca*/ nullptr));
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@ -849,11 +846,10 @@ static bool CanShareConstantPoolEntry(const Constant *A, const Constant *B,
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if (isa<StructType>(A->getType()) || isa<ArrayType>(A->getType()) ||
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isa<StructType>(B->getType()) || isa<ArrayType>(B->getType()))
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return false;
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// For now, only support constants with the same size.
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uint64_t StoreSize = TD->getTypeStoreSize(A->getType());
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if (StoreSize != TD->getTypeStoreSize(B->getType()) ||
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StoreSize > 128)
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if (StoreSize != TD->getTypeStoreSize(B->getType()) || StoreSize > 128)
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return false;
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Type *IntTy = IntegerType::get(A->getContext(), StoreSize*8);
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@ -882,7 +878,7 @@ static bool CanShareConstantPoolEntry(const Constant *A, const Constant *B,
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/// an existing one. User must specify the log2 of the minimum required
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/// alignment for the object.
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///
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unsigned MachineConstantPool::getConstantPoolIndex(const Constant *C,
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unsigned MachineConstantPool::getConstantPoolIndex(const Constant *C,
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unsigned Alignment) {
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assert(Alignment && "Alignment must be specified!");
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if (Alignment > PoolAlignment) PoolAlignment = Alignment;
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@ -997,9 +997,9 @@ bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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// Push GPRs. It increases frame size.
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unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
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for (unsigned i = CSI.size(); i != 0; --i) {
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unsigned Reg = CSI[i-1].getReg();
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if (!X86::GR64RegClass.contains(Reg) &&
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!X86::GR32RegClass.contains(Reg))
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unsigned Reg = CSI[i - 1].getReg();
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if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
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continue;
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// Add the callee-saved register as live-in. It's killed at the spill.
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MBB.addLiveIn(Reg);
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@ -1024,8 +1024,9 @@ bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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// Add the callee-saved register as live-in. It's killed at the spill.
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MBB.addLiveIn(Reg);
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(),
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RC, TRI);
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TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
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TRI);
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}
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return true;
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@ -1050,9 +1051,9 @@ bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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if (X86::GR64RegClass.contains(Reg) ||
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X86::GR32RegClass.contains(Reg))
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continue;
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(),
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RC, TRI);
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TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
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}
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// POP GPRs.
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@ -110,7 +110,7 @@ let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in
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// When using segmented stacks these are lowered into instructions which first
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// check if the current stacklet has enough free memory. If it does, memory is
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// allocated by bumping the stack pointer. Otherwise memory is allocated from
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// allocated by bumping the stack pointer. Otherwise memory is allocated from
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// the heap.
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let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in
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@ -371,7 +371,7 @@ let Defs = [RCX,RDI], isCodeGenOnly = 1 in {
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def REP_STOSD_64 : I<0xAB, RawFrm, (outs), (ins), "{rep;stosl|rep stosd}",
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[(X86rep_stos i32)], IIC_REP_STOS>, REP, OpSize32,
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Requires<[In64BitMode]>;
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let Uses = [RAX,RCX,RDI] in
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def REP_STOSQ_64 : RI<0xAB, RawFrm, (outs), (ins), "{rep;stosq|rep stosq}",
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[(X86rep_stos i64)], IIC_REP_STOS>, REP,
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