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Move ARMMachObjectWriter to its own file.
Just tidy up a bit. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133638 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -27,6 +27,7 @@ class FunctionPass;
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class JITCodeEmitter;
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class formatted_raw_ostream;
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class MCCodeEmitter;
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class MCObjectWriter;
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class TargetAsmBackend;
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class MachineInstr;
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class ARMAsmPrinter;
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@ -58,6 +59,12 @@ extern Target TheARMTarget, TheThumbTarget;
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void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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ARMAsmPrinter &AP);
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/// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
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MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
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bool Is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype);
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} // end namespace llvm;
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#endif
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@ -28,14 +28,6 @@
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using namespace llvm;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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public:
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ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
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/*UseAggressiveSymbolFolding=*/true) {}
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};
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class ARMELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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ARMELFObjectWriter(Triple::OSType OSType)
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@ -423,12 +415,9 @@ public:
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: ARMAsmBackend(T), Subtype(st) { }
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMachObjectWriter(new ARMMachObjectWriter(
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/*Is64Bit=*/false,
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return createARMMachObjectWriter(OS, /*Is64Bit=*/false,
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object::mach::CTM_ARM,
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Subtype),
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OS,
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/*IsLittleEndian=*/true);
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Subtype);
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}
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void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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32
lib/Target/ARM/ARMMachObjectWriter.cpp
Normal file
32
lib/Target/ARM/ARMMachObjectWriter.cpp
Normal file
@ -0,0 +1,32 @@
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//===-- ARMMachObjectWriter.cpp - ARM Mach Object Writer ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "ARM.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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using namespace llvm;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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public:
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ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
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/*UseAggressiveSymbolFolding=*/true) {}
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};
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}
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MCObjectWriter *llvm::createARMMachObjectWriter(raw_ostream &OS,
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bool Is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype) {
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return createMachObjectWriter(new ARMMachObjectWriter(Is64Bit,
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CPUType,
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CPUSubtype),
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OS, /*IsLittleEndian=*/true);
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}
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@ -34,6 +34,7 @@ add_llvm_target(ARMCodeGen
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ARMISelLowering.cpp
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ARMInstrInfo.cpp
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ARMJITInfo.cpp
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ARMMachObjectWriter.cpp
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ARMMCCodeEmitter.cpp
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ARMMCExpr.cpp
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ARMLoadStoreOptimizer.cpp
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