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https://github.com/c64scene-ar/llvm-6502.git
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Support for passing 128-bit vector arguments via XMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
f7179bb56e
commit
2fdd95eee7
@ -413,10 +413,13 @@ static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg,
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return VReg;
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}
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/// getFormalArgSize - Return the minimum size of the stack frame needed to store
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/// an object of the specified type.
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static unsigned getFormalArgSize(MVT::ValueType ObjectVT) {
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unsigned ObjSize = 0;
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/// HowToPassCCCArgument - Returns how an formal argument of the specified type
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/// should be passed. If it is through stack, returns the size of the stack
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/// frame; if it is through XMM register, returns the number of XMM registers
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/// are needed.
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static void
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HowToPassCCCArgument(MVT::ValueType ObjectVT, unsigned NumXMMRegs,
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unsigned &ObjSize, unsigned &ObjXMMRegs) {
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switch (ObjectVT) {
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default: assert(0 && "Unhandled argument type!");
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case MVT::i1:
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@ -426,8 +429,18 @@ static unsigned getFormalArgSize(MVT::ValueType ObjectVT) {
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case MVT::i64: ObjSize = 8; break;
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case MVT::f32: ObjSize = 4; break;
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case MVT::f64: ObjSize = 8; break;
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case MVT::v16i8:
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case MVT::v8i16:
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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if (NumXMMRegs < 3)
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ObjXMMRegs = 1;
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else
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ObjSize = 16;
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break;
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}
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return ObjSize;
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}
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/// getFormalArgObjects - Returns itself if Op is a FORMAL_ARGUMENTS, otherwise
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@ -466,6 +479,8 @@ void X86TargetLowering::PreprocessCCCArguments(std::vector<SDOperand>Args,
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// ...
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//
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unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot
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unsigned NumXMMRegs = 0; // XMM regs used for parameter passing.
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unsigned XMMArgRegs[] = { X86::XMM0, X86::XMM1, X86::XMM2 };
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for (unsigned i = 0; i < NumArgs; ++i) {
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SDOperand Op = Args[i];
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std::vector<SDOperand> Objs = getFormalArgObjects(Op);
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@ -474,10 +489,22 @@ void X86TargetLowering::PreprocessCCCArguments(std::vector<SDOperand>Args,
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SDOperand Obj = *I;
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MVT::ValueType ObjectVT = Obj.getValueType();
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unsigned ArgIncrement = 4;
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unsigned ObjSize = getFormalArgSize(ObjectVT);
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if (ObjSize == 8)
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ArgIncrement = 8;
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unsigned ObjSize = 0;
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unsigned ObjXMMRegs = 0;
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HowToPassCCCArgument(ObjectVT, NumXMMRegs, ObjSize, ObjXMMRegs);
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if (ObjSize >= 8)
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ArgIncrement = ObjSize;
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if (ObjXMMRegs) {
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// Passed in a XMM register.
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unsigned Reg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
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X86::VR128RegisterClass);
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std::pair<FALocInfo, FALocInfo> Loc =
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std::make_pair(FALocInfo(FALocInfo::LiveInRegLoc, Reg, ObjectVT),
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FALocInfo());
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FormalArgLocs.push_back(Loc);
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NumXMMRegs += ObjXMMRegs;
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} else {
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// Create the frame index object for this incoming parameter...
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int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
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std::pair<FALocInfo, FALocInfo> Loc =
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@ -486,6 +513,7 @@ void X86TargetLowering::PreprocessCCCArguments(std::vector<SDOperand>Args,
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ArgOffset += ArgIncrement; // Move on to the next argument...
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}
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}
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}
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// If the function takes variable number of arguments, make a frame index for
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// the start of the first vararg value... for expansion of llvm.va_start.
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@ -502,11 +530,19 @@ void X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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for (unsigned i = 0; i < NumArgs; ++i) {
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std::pair<FALocInfo, FALocInfo> Loc = FormalArgLocs[i];
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SDOperand ArgValue;
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if (Loc.first.Kind == FALocInfo::StackFrameLoc) {
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// Create the SelectionDAG nodes corresponding to a load from this parameter
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unsigned FI = FormalArgLocs[i].first.Loc;
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SDOperand FIN = DAG.getFrameIndex(FI, MVT::i32);
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SDOperand ArgValue = DAG.getLoad(Op.Val->getValueType(i),DAG.getEntryNode(),
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FIN, DAG.getSrcValue(NULL));
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ArgValue = DAG.getLoad(Op.Val->getValueType(i),
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DAG.getEntryNode(), FIN, DAG.getSrcValue(NULL));
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} else {
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// Must be a CopyFromReg
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ArgValue= DAG.getCopyFromReg(DAG.getEntryNode(), Loc.first.Loc,
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Loc.first.Typ);
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}
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FormalArgs.push_back(ArgValue);
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}
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}
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@ -741,9 +777,15 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy,
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static unsigned FASTCC_NUM_INT_ARGS_INREGS = 0;
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/// HowToPassFastCCArgument - Returns how an formal argument of the specified
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/// type should be passed. If it is through stack, returns the size of the stack
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/// frame; if it is through integer or XMM register, returns the number of
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/// integer or XMM registers are needed.
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static void
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HowToPassFastCCArgument(MVT::ValueType ObjectVT, unsigned NumIntRegs,
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unsigned &ObjSize, unsigned &ObjIntRegs) {
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HowToPassFastCCArgument(MVT::ValueType ObjectVT,
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unsigned NumIntRegs, unsigned NumXMMRegs,
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unsigned &ObjSize, unsigned &ObjIntRegs,
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unsigned &ObjXMMRegs) {
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ObjSize = 0;
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NumIntRegs = 0;
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@ -782,6 +824,17 @@ HowToPassFastCCArgument(MVT::ValueType ObjectVT, unsigned NumIntRegs,
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case MVT::f64:
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ObjSize = 8;
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break;
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case MVT::v16i8:
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case MVT::v8i16:
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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if (NumXMMRegs < 3)
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ObjXMMRegs = 1;
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else
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ObjSize = 16;
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break;
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}
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}
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@ -805,6 +858,8 @@ X86TargetLowering::PreprocessFastCCArguments(std::vector<SDOperand>Args,
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// 0 (neither EAX or EDX used), 1 (EAX is used) or 2 (EAX and EDX are both
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// used).
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unsigned NumIntRegs = 0;
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unsigned NumXMMRegs = 0; // XMM regs used for parameter passing.
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unsigned XMMArgRegs[] = { X86::XMM0, X86::XMM1, X86::XMM2 };
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for (unsigned i = 0; i < NumArgs; ++i) {
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SDOperand Op = Args[i];
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@ -816,10 +871,12 @@ X86TargetLowering::PreprocessFastCCArguments(std::vector<SDOperand>Args,
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unsigned ArgIncrement = 4;
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unsigned ObjSize = 0;
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unsigned ObjIntRegs = 0;
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unsigned ObjXMMRegs = 0;
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HowToPassFastCCArgument(ObjectVT, NumIntRegs, ObjSize, ObjIntRegs);
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if (ObjSize == 8)
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ArgIncrement = 8;
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HowToPassFastCCArgument(ObjectVT, NumIntRegs, NumXMMRegs,
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ObjSize, ObjIntRegs, ObjXMMRegs);
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if (ObjSize >= 8)
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ArgIncrement = ObjSize;
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unsigned Reg;
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std::pair<FALocInfo,FALocInfo> Loc = std::make_pair(FALocInfo(),
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@ -862,8 +919,20 @@ X86TargetLowering::PreprocessFastCCArguments(std::vector<SDOperand>Args,
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Loc.second.Typ = MVT::i32;
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}
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break;
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case MVT::v16i8:
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case MVT::v8i16:
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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Reg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], X86::VR128RegisterClass);
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Loc.first.Kind = FALocInfo::LiveInRegLoc;
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Loc.first.Loc = Reg;
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Loc.first.Typ = ObjectVT;
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break;
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}
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NumIntRegs += ObjIntRegs;
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NumXMMRegs += ObjXMMRegs;
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}
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if (ObjSize) {
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int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
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@ -928,7 +997,8 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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DAG.getSrcValue(NULL));
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} else {
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// Must be a CopyFromReg
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ArgValue= DAG.getCopyFromReg(DAG.getRoot(), Loc.first.Loc, Loc.first.Typ);
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ArgValue= DAG.getCopyFromReg(DAG.getEntryNode(), Loc.first.Loc,
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Loc.first.Typ);
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}
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if (Loc.second.Kind != FALocInfo::None) {
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@ -940,7 +1010,7 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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DAG.getSrcValue(NULL));
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} else {
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// Must be a CopyFromReg
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ArgValue2 = DAG.getCopyFromReg(DAG.getRoot(),
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ArgValue2 = DAG.getCopyFromReg(DAG.getEntryNode(),
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Loc.second.Loc, Loc.second.Typ);
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}
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ArgValue = DAG.getNode(ISD::BUILD_PAIR, VT, ArgValue, ArgValue2);
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