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Implement SELECT_CC (f32/f64) for ARM.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32762 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lauro Ramos Venancio 2006-12-28 13:11:14 +00:00
parent 6547c55988
commit 301009a0fc
2 changed files with 16 additions and 2 deletions
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4
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -73,6 +73,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::SETCC, MVT::f64, Expand); setOperationAction(ISD::SETCC, MVT::f64, Expand);
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
setOperationAction(ISD::MEMMOVE, MVT::Other, Expand); setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
setOperationAction(ISD::MEMSET, MVT::Other, Expand); setOperationAction(ISD::MEMSET, MVT::Other, Expand);
@ -745,7 +747,7 @@ static SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG) {
SDOperand Cmp; SDOperand Cmp;
SDOperand ARMCC; SDOperand ARMCC;
LowerCMP(Cmp, ARMCC, LHS, RHS, CC, DAG); LowerCMP(Cmp, ARMCC, LHS, RHS, CC, DAG);
return DAG.getNode(ARMISD::SELECT, MVT::i32, TrueVal, FalseVal, ARMCC, Cmp); return DAG.getNode(ARMISD::SELECT, Op.getValueType(), TrueVal, FalseVal, ARMCC, Cmp);
} }
static SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG) { static SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG) {

14
lib/Target/ARM/ARMInstrInfo.td
View File

@ -102,7 +102,7 @@ def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall,
def retflag : SDNode<"ARMISD::RET_FLAG", SDTRet, def retflag : SDNode<"ARMISD::RET_FLAG", SDTRet,
[SDNPHasChain, SDNPOptInFlag]>; [SDNPHasChain, SDNPOptInFlag]>;
def SDTarmselect : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>, SDTCisVT<2, i32>]>; def SDTarmselect : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>]>;
def armselect : SDNode<"ARMISD::SELECT", SDTarmselect, [SDNPInFlag, SDNPOutFlag]>; def armselect : SDNode<"ARMISD::SELECT", SDTarmselect, [SDNPInFlag, SDNPOutFlag]>;
def SDTarmfmstat : SDTypeProfile<0, 0, []>; def SDTarmfmstat : SDTypeProfile<0, 0, []>;
@ -209,6 +209,18 @@ let isTwoAddress = 1 in {
"mov$cc $dst, $true", "mov$cc $dst, $true",
[(set IntRegs:$dst, (armselect addr_mode1:$true, [(set IntRegs:$dst, (armselect addr_mode1:$true,
IntRegs:$false, imm:$cc))]>; IntRegs:$false, imm:$cc))]>;
def fcpyscond : InstARM<(ops FPRegs:$dst, FPRegs:$false,
FPRegs:$true, CCOp:$cc),
"fcpys$cc $dst, $true",
[(set FPRegs:$dst, (armselect FPRegs:$true,
FPRegs:$false, imm:$cc))]>;
def fcpydcond : InstARM<(ops DFPRegs:$dst, DFPRegs:$false,
DFPRegs:$true, CCOp:$cc),
"fcpyd$cc $dst, $true",
[(set DFPRegs:$dst, (armselect DFPRegs:$true,
DFPRegs:$false, imm:$cc))]>;
} }
def MUL : IntBinOp<"mul", mul>; def MUL : IntBinOp<"mul", mul>;