From 303a00ec48d35bf3ce4860fc141954efb3bfcd95 Mon Sep 17 00:00:00 2001 From: Kevin Enderby Date: Fri, 13 Dec 2013 22:46:54 +0000 Subject: [PATCH] Fixed a bug in getARMFixupKindMachOInfo() where three ARM fixup kinds were falling into the cases for 24-bit branch kinds which are not 24-bit branches. The routine is to return false for fixups are expected to always be resolvable at assembly time. Which these three fixups are as they have limited displacement and are for local references within a function. rdar://15586725 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197282 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp | 6 +++++- test/MC/MachO/ARM/bad-darwin-ARM-reloc.s | 9 +++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) create mode 100644 test/MC/MachO/ARM/bad-darwin-ARM-reloc.s diff --git a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp index 1f681bac224..4ef18b4298b 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp @@ -82,10 +82,14 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType, Log2Size = llvm::Log2_32(8); return true; - // Handle 24-bit branch kinds. + // These fixups are expected to always be resolvable at assembly time and + // have no relocations supported. case ARM::fixup_arm_ldst_pcrel_12: case ARM::fixup_arm_pcrel_10: case ARM::fixup_arm_adr_pcrel_12: + return false; + + // Handle 24-bit branch kinds. case ARM::fixup_arm_condbranch: case ARM::fixup_arm_uncondbranch: case ARM::fixup_arm_uncondbl: diff --git a/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s b/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s new file mode 100644 index 00000000000..7ad91df3ce0 --- /dev/null +++ b/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s @@ -0,0 +1,9 @@ +@ RUN: not llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o - 2> %t.err > %t +@ RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s +@ rdar://15586725 +.text + ldr r3, L___fcommon +.section myseg, mysect +L___fcommon: + .word 0 +@ CHECK-ERROR: unsupported relocation on symbol