mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 04:30:23 +00:00
ARM IAS: support .inst directive
This adds support for the .inst directive. This is an ARM specific directive to indicate an instruction encoded as a constant expression. The major difference between .word, .short, or .byte and .inst is that the latter will be disassembled as an instruction since it does not get flagged as data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197657 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -95,6 +95,7 @@ public:
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virtual void emitFPU(unsigned FPU) = 0;
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virtual void emitFPU(unsigned FPU) = 0;
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virtual void emitArch(unsigned Arch) = 0;
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virtual void emitArch(unsigned Arch) = 0;
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virtual void finishAttributeSection() = 0;
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virtual void finishAttributeSection() = 0;
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virtual void emitInst(uint32_t Inst, char Suffix = '\0') = 0;
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};
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};
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/// MCStreamer - Streaming machine code generation interface. This interface
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/// MCStreamer - Streaming machine code generation interface. This interface
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@ -19,6 +19,7 @@
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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@ -150,6 +151,7 @@ class ARMAsmParser : public MCTargetAsmParser {
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bool parseDirectiveSetFP(SMLoc L);
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bool parseDirectiveSetFP(SMLoc L);
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bool parseDirectivePad(SMLoc L);
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bool parseDirectivePad(SMLoc L);
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bool parseDirectiveRegSave(SMLoc L, bool IsVector);
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bool parseDirectiveRegSave(SMLoc L, bool IsVector);
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bool parseDirectiveInst(SMLoc L, char Suffix = '\0');
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StringRef splitMnemonic(StringRef Mnemonic, unsigned &PredicationCode,
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StringRef splitMnemonic(StringRef Mnemonic, unsigned &PredicationCode,
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bool &CarrySetting, unsigned &ProcessorIMod,
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bool &CarrySetting, unsigned &ProcessorIMod,
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@ -7809,6 +7811,12 @@ bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) {
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return parseDirectiveRegSave(DirectiveID.getLoc(), false);
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return parseDirectiveRegSave(DirectiveID.getLoc(), false);
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else if (IDVal == ".vsave")
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else if (IDVal == ".vsave")
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return parseDirectiveRegSave(DirectiveID.getLoc(), true);
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return parseDirectiveRegSave(DirectiveID.getLoc(), true);
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else if (IDVal == ".inst")
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return parseDirectiveInst(DirectiveID.getLoc());
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else if (IDVal == ".inst.n")
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return parseDirectiveInst(DirectiveID.getLoc(), 'n');
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else if (IDVal == ".inst.w")
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return parseDirectiveInst(DirectiveID.getLoc(), 'w');
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return true;
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return true;
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}
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}
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@ -8288,6 +8296,78 @@ bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) {
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return false;
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return false;
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}
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}
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/// parseDirectiveInst
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/// ::= .inst opcode [, ...]
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/// ::= .inst.n opcode [, ...]
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/// ::= .inst.w opcode [, ...]
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bool ARMAsmParser::parseDirectiveInst(SMLoc Loc, char Suffix) {
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int Width;
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if (isThumb()) {
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switch (Suffix) {
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case 'n':
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Width = 2;
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break;
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case 'w':
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Width = 4;
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break;
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default:
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Parser.eatToEndOfStatement();
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return Error(Loc, "cannot determine Thumb instruction size, "
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"use inst.n/inst.w instead");
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}
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} else {
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if (Suffix) {
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Parser.eatToEndOfStatement();
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return Error(Loc, "width suffixes are invalid in ARM mode");
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}
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Width = 4;
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}
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if (getLexer().is(AsmToken::EndOfStatement)) {
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Parser.eatToEndOfStatement();
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return Error(Loc, "expected expression following directive");
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}
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for (;;) {
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const MCExpr *Expr;
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if (getParser().parseExpression(Expr))
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return Error(Loc, "expected expression");
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const MCConstantExpr *Value = dyn_cast_or_null<MCConstantExpr>(Expr);
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if (!Value)
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return Error(Loc, "expected constant expression");
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switch (Width) {
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case 2:
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if (Value->getValue() > 0xffff)
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return Error(Loc, "inst.n operand is too big, use inst.w instead");
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break;
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case 4:
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if (Value->getValue() > 0xffffffff)
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return Error(Loc,
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StringRef(Suffix ? "inst.w" : "inst") + " operand is too big");
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break;
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default:
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llvm_unreachable("only supported widths are 2 and 4");
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}
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getTargetStreamer().emitInst(Value->getValue(), Suffix);
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if (getLexer().is(AsmToken::EndOfStatement))
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break;
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if (getLexer().isNot(AsmToken::Comma))
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return Error(Loc, "unexpected token in directive");
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Parser.Lex();
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}
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Parser.Lex();
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return false;
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}
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/// Force static initialization.
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/// Force static initialization.
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extern "C" void LLVMInitializeARMAsmParser() {
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extern "C" void LLVMInitializeARMAsmParser() {
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RegisterMCAsmParser<ARMAsmParser> X(TheARMTarget);
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RegisterMCAsmParser<ARMAsmParser> X(TheARMTarget);
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@ -20,8 +20,10 @@
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#include "ARMUnwindOp.h"
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#include "ARMUnwindOp.h"
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#include "ARMUnwindOpAsm.h"
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#include "ARMUnwindOpAsm.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCContext.h"
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@ -121,6 +123,7 @@ class ARMTargetAsmStreamer : public ARMTargetStreamer {
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitArch(unsigned Arch);
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virtual void emitArch(unsigned Arch);
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virtual void emitFPU(unsigned FPU);
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virtual void emitFPU(unsigned FPU);
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virtual void emitInst(uint32_t Inst, char Suffix = '\0');
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virtual void finishAttributeSection();
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virtual void finishAttributeSection();
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public:
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public:
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@ -190,6 +193,13 @@ void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
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void ARMTargetAsmStreamer::finishAttributeSection() {
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void ARMTargetAsmStreamer::finishAttributeSection() {
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}
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}
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void ARMTargetAsmStreamer::emitInst(uint32_t Inst, char Suffix) {
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OS << "\t.inst";
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if (Suffix)
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OS << "." << Suffix;
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OS << "\t0x" << utohexstr(Inst) << "\n";
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}
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class ARMTargetELFStreamer : public ARMTargetStreamer {
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class ARMTargetELFStreamer : public ARMTargetStreamer {
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private:
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private:
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// This structure holds all attributes, accounting for
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// This structure holds all attributes, accounting for
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@ -295,6 +305,7 @@ private:
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitArch(unsigned Arch);
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virtual void emitArch(unsigned Arch);
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virtual void emitFPU(unsigned FPU);
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virtual void emitFPU(unsigned FPU);
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virtual void emitInst(uint32_t Inst, char Suffix = '\0');
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virtual void finishAttributeSection();
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virtual void finishAttributeSection();
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size_t calculateContentSize() const;
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size_t calculateContentSize() const;
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@ -367,6 +378,44 @@ public:
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MCELFStreamer::EmitInstruction(Inst);
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MCELFStreamer::EmitInstruction(Inst);
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}
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}
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virtual void emitInst(uint32_t Inst, char Suffix) {
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unsigned Size;
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char Buffer[4];
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const bool LittleEndian = getContext().getAsmInfo()->isLittleEndian();
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switch (Suffix) {
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case '\0':
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Size = 4;
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assert(!IsThumb);
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EmitARMMappingSymbol();
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for (unsigned II = 0, IE = Size; II != IE; II++) {
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const unsigned I = LittleEndian ? (Size - II - 1) : II;
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Buffer[Size - II - 1] = uint8_t(Inst >> I * CHAR_BIT);
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}
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break;
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case 'n':
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case 'w':
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Size = (Suffix == 'n' ? 2 : 4);
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assert(IsThumb);
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EmitThumbMappingSymbol();
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for (unsigned II = 0, IE = Size; II != IE; II = II + 2) {
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const unsigned I0 = LittleEndian ? II + 0 : (Size - II - 1);
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const unsigned I1 = LittleEndian ? II + 1 : (Size - II - 2);
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Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT);
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Buffer[Size - II - 1] = uint8_t(Inst >> I1 * CHAR_BIT);
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}
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break;
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default:
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llvm_unreachable("Invalid Suffix");
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}
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MCELFStreamer::EmitBytes(StringRef(Buffer, Size));
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}
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/// This is one of the functions used to emit data into an ELF section, so the
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/// This is one of the functions used to emit data into an ELF section, so the
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/// ARM streamer overrides it to add the appropriate mapping symbol ($d) if
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/// ARM streamer overrides it to add the appropriate mapping symbol ($d) if
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/// necessary.
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/// necessary.
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@ -791,6 +840,9 @@ void ARMTargetELFStreamer::finishAttributeSection() {
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Contents.clear();
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Contents.clear();
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FPU = ARM::INVALID_FPU;
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FPU = ARM::INVALID_FPU;
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}
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}
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void ARMTargetELFStreamer::emitInst(uint32_t Inst, char Suffix) {
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getStreamer().emitInst(Inst, Suffix);
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}
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void ARMELFStreamer::FinishImpl() {
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void ARMELFStreamer::FinishImpl() {
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MCTargetStreamer &TS = getTargetStreamer();
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MCTargetStreamer &TS = getTargetStreamer();
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15
test/MC/ARM/inst-arm-suffixes.s
Normal file
15
test/MC/ARM/inst-arm-suffixes.s
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@ -0,0 +1,15 @@
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@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
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@ RUN: | FileCheck -check-prefix CHECK-ERROR %s
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.syntax unified
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.arm
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.align 2
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.global suffixes_invalid_in_arm
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.type suffixes_invalid_in_arm,%function
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suffixes_invalid_in_arm:
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.inst.n 2
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@ CHECK-ERROR: width suffixes are invalid in ARM mode
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.inst.w 4
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@ CHECK-ERROR: width suffixes are invalid in ARM mode
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15
test/MC/ARM/inst-constant-required.s
Normal file
15
test/MC/ARM/inst-constant-required.s
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@ -0,0 +1,15 @@
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@ RUN: not llvm-mc %s -triple=armv7-linux-gnueabi -filetype asm -o - 2>&1 \
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@ RUN: | FileCheck -check-prefix CHECK-ERROR %s
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.syntax unified
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.arm
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.align 2
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.global constant_expression_required
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.type constant_expression_required,%function
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constant_expression_required:
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.Label:
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movs r0, r0
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.inst .Label
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@ CHECK-ERROR: expected constant expression
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20
test/MC/ARM/inst-directive-emit.s
Normal file
20
test/MC/ARM/inst-directive-emit.s
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@ -0,0 +1,20 @@
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@ RUN: llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - | FileCheck %s
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.syntax unified
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.thumb
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.align 2
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.global emit_asm
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.type emit_asm,%function
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emit_asm:
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.inst.w 0xf2400000, 0xf2c00000
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@ CHECK: .text
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@ CHECK: .code 16
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@ CHECK: .align 2
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@ CHECK: .globl emit_asm
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@ CHECK: .type emit_asm,%function
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@ CHECK: emit_asm:
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@ CHECK: inst.w 0xF2400000
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@ CHECK: inst.w 0xF2C00000
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81
test/MC/ARM/inst-directive.s
Normal file
81
test/MC/ARM/inst-directive.s
Normal file
@ -0,0 +1,81 @@
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@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s
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.syntax unified
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@-------------------------------------------------------------------------------
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@ arm_inst
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@-------------------------------------------------------------------------------
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.arm
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.section .inst.arm_inst
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.align 2
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.global arm_inst
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.type arm_inst,%function
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arm_inst:
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.inst 0xdefe
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@ CHECK: Section {
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@ CHECK: Name: .inst.arm_inst
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@ CHECK: SectionData (
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@ CHECK-NEXT: 0000: FEDE0000
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@ CHECK-NEXT: )
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@-------------------------------------------------------------------------------
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@ thumb_inst_n
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@-------------------------------------------------------------------------------
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.thumb
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.section .inst.thumb_inst_n
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.align 2
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.global thumb_inst_n
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.type thumb_inst_n,%function
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thumb_inst_n:
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.inst.n 0xdefe
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@ CHECK: Section {
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@ CHECK: Name: .inst.thumb_inst_n
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@ CHECK: SectionData (
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@ CHECK-NEXT: 0000: FEDE
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@ CHECK-NEXT: )
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@-------------------------------------------------------------------------------
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@ thumb_inst_w
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@-------------------------------------------------------------------------------
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.thumb
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.section .inst.thumb_inst_w
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.align 2
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.global thumb_inst_w
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.type thumb_inst_w,%function
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thumb_inst_w:
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.inst.w 0x00000000
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@ CHECK: Section {
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@ CHECK: Name: .inst.thumb_inst_w
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@ CHECK: SectionData (
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@ CHECK-NEXT: 0000: 00000000
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@ CHECK-NEXT: )
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@-------------------------------------------------------------------------------
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@ thumb_inst_w
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@-------------------------------------------------------------------------------
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.thumb
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.section .inst.thumb_inst_inst
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.align 2
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.global thumb_inst_inst
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.type thumb_inst_inst,%function
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thumb_inst_inst:
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.inst.w 0xf2400000, 0xf2c00000
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@ CHECK: Section {
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@ CHECK: Name: .inst.thumb_inst_inst
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@ CHECK: SectionData (
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@ CHECK-NEXT: 0000: 40F20000 C0F20000
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@ CHECK-NEXT: )
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|
14
test/MC/ARM/inst-overflow.s
Normal file
14
test/MC/ARM/inst-overflow.s
Normal file
@ -0,0 +1,14 @@
|
|||||||
|
@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
|
||||||
|
@ RUN: | FileCheck -check-prefix CHECK-ERROR %s
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.arm
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.global constant_overflow
|
||||||
|
.type constant_overflow,%function
|
||||||
|
constant_overflow:
|
||||||
|
.inst 1 << 32
|
||||||
|
@ CHECK-ERROR: inst operand is too big
|
||||||
|
|
||||||
|
|
13
test/MC/ARM/inst-thumb-overflow-2.s
Normal file
13
test/MC/ARM/inst-thumb-overflow-2.s
Normal file
@ -0,0 +1,13 @@
|
|||||||
|
@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
|
||||||
|
@ RUN: | FileCheck -check-prefix CHECK-ERRORS %s
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.global constant_overflow
|
||||||
|
.type constant_overflow,%function
|
||||||
|
constant_overflow:
|
||||||
|
.inst.w 1 << 32
|
||||||
|
@ CHECK-ERRORS: inst.w operand is too big
|
||||||
|
|
13
test/MC/ARM/inst-thumb-overflow.s
Normal file
13
test/MC/ARM/inst-thumb-overflow.s
Normal file
@ -0,0 +1,13 @@
|
|||||||
|
@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
|
||||||
|
@ RUN: | FileCheck -check-prefix CHECK-ERROR %s
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.global constant_overflow
|
||||||
|
.type constant_overflow,%function
|
||||||
|
constant_overflow:
|
||||||
|
.inst.n 1 << 31
|
||||||
|
@ CHECK-ERROR: inst.n operand is too big, use inst.w instead
|
||||||
|
|
13
test/MC/ARM/inst-thumb-suffixes.s
Normal file
13
test/MC/ARM/inst-thumb-suffixes.s
Normal file
@ -0,0 +1,13 @@
|
|||||||
|
@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
|
||||||
|
@ RUN: | FileCheck -check-prefix CHECK-ERROR %s
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.global suffixes_required_in_thumb
|
||||||
|
.type suffixes_required_in_thumb,%function
|
||||||
|
suffixes_required_in_thumb:
|
||||||
|
.inst 0x0000
|
||||||
|
@ CHECK-ERROR: cannot determine Thumb instruction size, use inst.n/inst.w instead
|
||||||
|
|
Loading…
Reference in New Issue
Block a user