R600/SI: Refactor AMDGPUAsmPrinter::EmitProgramInfoSI()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223144 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2014-12-02 19:45:05 +00:00
parent 70fb375383
commit 30892329d4

View File

@ -358,19 +358,21 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
ProgInfo.CodeLen = CodeSize;
}
static unsigned getRsrcReg(unsigned ShaderType) {
switch (ShaderType) {
default: // Fall through
case ShaderType::COMPUTE: return R_00B848_COMPUTE_PGM_RSRC1;
case ShaderType::GEOMETRY: return R_00B228_SPI_SHADER_PGM_RSRC1_GS;
case ShaderType::PIXEL: return R_00B028_SPI_SHADER_PGM_RSRC1_PS;
case ShaderType::VERTEX: return R_00B128_SPI_SHADER_PGM_RSRC1_VS;
}
}
void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF,
const SIProgramInfo &KernelInfo) {
const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
unsigned RsrcReg;
switch (MFI->getShaderType()) {
default: // Fall through
case ShaderType::COMPUTE: RsrcReg = R_00B848_COMPUTE_PGM_RSRC1; break;
case ShaderType::GEOMETRY: RsrcReg = R_00B228_SPI_SHADER_PGM_RSRC1_GS; break;
case ShaderType::PIXEL: RsrcReg = R_00B028_SPI_SHADER_PGM_RSRC1_PS; break;
case ShaderType::VERTEX: RsrcReg = R_00B128_SPI_SHADER_PGM_RSRC1_VS; break;
}
unsigned RsrcReg = getRsrcReg(MFI->getShaderType());
unsigned LDSAlignShift;
if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {