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[x86] Fix PR21139, one of the last remaining regressions found in the
new vector shuffle lowering. This is loosely based on a patch by Marius Wachtler to the PR (thanks!). I refactored it a bi to use std::count_if and a mutable array ref but the core idea was exactly right. I also added some direct testing of this case. I believe PR21137 is now the only remaining regression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219081 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -9278,21 +9278,29 @@ static SDValue lowerV16I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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//
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// FIXME: We need to handle other interleaving widths (i16, i32, ...).
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if (shouldLowerAsInterleaving(Mask)) {
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// FIXME: Figure out whether we should pack these into the low or high
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// halves.
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int EMask[16], OMask[16];
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int NumLoHalf = std::count_if(Mask.begin(), Mask.end(), [](int M) {
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return (M >= 0 && M < 8) || (M >= 16 && M < 24);
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});
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int NumHiHalf = std::count_if(Mask.begin(), Mask.end(), [](int M) {
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return (M >= 8 && M < 16) || M >= 24;
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});
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int EMask[16] = {-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1};
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int OMask[16] = {-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1};
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bool UnpackLo = NumLoHalf >= NumHiHalf;
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MutableArrayRef<int> TargetEMask(UnpackLo ? EMask : EMask + 8, 8);
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MutableArrayRef<int> TargetOMask(UnpackLo ? OMask : OMask + 8, 8);
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for (int i = 0; i < 8; ++i) {
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EMask[i] = Mask[2*i];
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OMask[i] = Mask[2*i + 1];
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EMask[i + 8] = -1;
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OMask[i + 8] = -1;
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TargetEMask[i] = Mask[2 * i];
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TargetOMask[i] = Mask[2 * i + 1];
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}
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SDValue Evens = DAG.getVectorShuffle(MVT::v16i8, DL, V1, V2, EMask);
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SDValue Odds = DAG.getVectorShuffle(MVT::v16i8, DL, V1, V2, OMask);
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return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, Evens, Odds);
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return DAG.getNode(UnpackLo ? X86ISD::UNPCKL : X86ISD::UNPCKH, DL,
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MVT::v16i8, Evens, Odds);
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}
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// Check for SSSE3 which lets us lower all v16i8 shuffles much more directly
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@ -232,6 +232,20 @@ define <16 x i8> @shuffle_v16i8_00_16_01_17_02_18_03_19_04_20_05_21_06_22_07_23(
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ret <16 x i8> %shuffle
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}
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define <16 x i8> @shuffle_v16i8_08_24_09_25_10_26_11_27_12_28_13_29_14_30_15_31(<16 x i8> %a, <16 x i8> %b) {
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; SSE-LABEL: shuffle_v16i8_08_24_09_25_10_26_11_27_12_28_13_29_14_30_15_31:
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; SSE: # BB#0:
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; SSE-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: shuffle_v16i8_08_24_09_25_10_26_11_27_12_28_13_29_14_30_15_31:
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; AVX: # BB#0:
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; AVX-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
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; AVX-NEXT: retq
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
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ret <16 x i8> %shuffle
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}
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define <16 x i8> @shuffle_v16i8_16_00_16_01_16_02_16_03_16_04_16_05_16_06_16_07(<16 x i8> %a, <16 x i8> %b) {
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; SSE-LABEL: shuffle_v16i8_16_00_16_01_16_02_16_03_16_04_16_05_16_06_16_07:
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; SSE: # BB#0:
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@ -373,7 +387,7 @@ define <16 x i8> @shuffle_v16i8_03_02_01_00_31_30_29_28_11_10_09_08_23_22_21_20(
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define <16 x i8> @trunc_v4i32_shuffle(<16 x i8> %a) {
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; SSE2-LABEL: trunc_v4i32_shuffle:
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; SSE2: # BB#0:
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; SSE2-NEXT: pand .LCPI13_0(%rip), %xmm0
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: packuswb %xmm0, %xmm0
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; SSE2-NEXT: packuswb %xmm0, %xmm0
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; SSE2-NEXT: retq
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@ -444,7 +458,7 @@ entry:
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define <16 x i8> @PR20540(<8 x i8> %a) {
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; SSE2-LABEL: PR20540:
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; SSE2: # BB#0:
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; SSE2-NEXT: pand .LCPI16_0(%rip), %xmm0
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: packuswb %xmm0, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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@ -767,7 +781,7 @@ define <16 x i8> @shuffle_v16i8_17_18_19_20_21_22_23_24_25_26_27_28_29_30_31_00(
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,0]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[1,2,3,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,5,6,7,7]
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; SSE2-NEXT: pand .LCPI23_0(%rip), %xmm0
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6,4]
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; SSE2-NEXT: movdqa %xmm1, %xmm3
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@ -821,7 +835,7 @@ define <16 x i8> @shuffle_v16i8_01_02_03_04_05_06_07_08_09_10_11_12_13_14_15_16(
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,7]
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; SSE2-NEXT: pand .LCPI24_0(%rip), %xmm1
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,3]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5,6,4]
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; SSE2-NEXT: movdqa %xmm0, %xmm3
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@ -191,9 +191,8 @@ define <16 x i16> @zext_16i8_to_16i16(<16 x i8> %z) {
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;
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; AVX1-LABEL: zext_16i8_to_16i16:
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; AVX1: # BB#0: # %entry
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; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
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; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
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; AVX1-NEXT: vpmovzxbw %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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