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Add LSR hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -559,6 +559,15 @@ public:
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/// valid for the specified target constraint letter.
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virtual bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
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//===--------------------------------------------------------------------===//
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// Loop Strength Reduction hooks
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//
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/// isLegalAddressImmediate - Return true if the integer value or GlobalValue
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/// can be used as the offset of the target addressing mode.
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virtual bool isLegalAddressImmediate(int64_t V) const;
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virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
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//===--------------------------------------------------------------------===//
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// Scheduler hooks
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//
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@ -976,3 +976,16 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
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return std::pair<unsigned, const TargetRegisterClass*>(0, 0);
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}
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//===----------------------------------------------------------------------===//
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// Loop Strength Reduction hooks
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//===----------------------------------------------------------------------===//
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/// isLegalAddressImmediate - Return true if the integer value or
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/// GlobalValue can be used as the offset of the target addressing mode.
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bool TargetLowering::isLegalAddressImmediate(int64_t V) const {
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return false;
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}
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bool TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
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return false;
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}
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@ -19,6 +19,8 @@
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#include "llvm/CallingConv.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/ADT/VectorExtras.h"
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#include "llvm/Analysis/ScalarEvolutionExpressions.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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@ -26,7 +28,6 @@
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/VectorExtras.h"
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using namespace llvm;
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// FIXME: temporary.
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@ -1317,6 +1318,16 @@ X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
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// X86 Custom Lowering Hooks
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//===----------------------------------------------------------------------===//
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/// DarwinGVRequiresExtraLoad - true if accessing the GV requires an extra
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/// load. For Darwin, external and weak symbols are indirect, loading the value
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/// at address GV rather then the value of GV itself. This means that the
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/// GlobalAddress must be in the base or index register of the address, not the
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/// GV offset field.
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static bool DarwinGVRequiresExtraLoad(GlobalValue *GV) {
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return (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
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(GV->isExternal() && !GV->hasNotBeenReadFromBytecode()));
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}
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/// LowerOperation - Provide custom lowering hooks for some operations.
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///
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SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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@ -1990,8 +2001,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// the GlobalAddress must be in the base or index register of the address,
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// not the GV offset field.
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if (getTargetMachine().getRelocationModel() != Reloc::Static &&
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(GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
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(GV->isExternal() && !GV->hasNotBeenReadFromBytecode())))
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DarwinGVRequiresExtraLoad(GV))
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Result = DAG.getLoad(MVT::i32, DAG.getEntryNode(),
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Result, DAG.getSrcValue(NULL));
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}
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@ -2179,3 +2189,24 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
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return std::vector<unsigned>();
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}
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/// isLegalAddressImmediate - Return true if the integer value or
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/// GlobalValue can be used as the offset of the target addressing mode.
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bool X86TargetLowering::isLegalAddressImmediate(int64_t V) const {
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// X86 allows a sign-extended 32-bit immediate field.
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return (V > -(1LL << 32) && V < (1LL << 32)-1);
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}
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bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
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if (getTargetMachine().
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getSubtarget<X86Subtarget>().isTargetDarwin()) {
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Reloc::Model RModel = getTargetMachine().getRelocationModel();
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if (RModel == Reloc::Static)
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return true;
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else if (RModel == Reloc::DynamicNoPIC)
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return DarwinGVRequiresExtraLoad(GV);
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else
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return false;
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} else
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return true;
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}
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