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[TableGen] Allow shift operators to take bits<n>
Convert the operand to int if possible, i.e. if the value is properly initialized. (I suppose there is further room for improvement here to also peform the shift if the uninitialized bits are shifted out.) With this little change we can now compute the scaling factor for compressed displacement with pure tablegen code in the X86 backend. This is useful because both the X86-disassembler-specific part of tablegen and the assembler need this and TD is the natural sharing place. The patch also adds the missing documentation for the shift and add operator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213277 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -208,6 +208,12 @@ supported include:
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on string, int and bit objects. Use !cast<string> to compare other types of
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objects.
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``!shl(a,b)``
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``!srl(a,b)``
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``!sra(a,b)``
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``!add(a,b)``
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The usual logical and arithmetic operators.
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Note that all of the values have rules specifying how they convert to values
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for different types. These rules allow you to assign a value like "``7``"
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to a "``bits<4>``" value, for example.
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@ -955,8 +955,10 @@ Init *BinOpInit::Fold(Record *CurRec, MultiClass *CurMultiClass) const {
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case SHL:
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case SRA:
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case SRL: {
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IntInit *LHSi = dyn_cast<IntInit>(LHS);
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IntInit *RHSi = dyn_cast<IntInit>(RHS);
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IntInit *LHSi =
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dyn_cast_or_null<IntInit>(LHS->convertInitializerTo(IntRecTy::get()));
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IntInit *RHSi =
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dyn_cast_or_null<IntInit>(RHS->convertInitializerTo(IntRecTy::get()));
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if (LHSi && RHSi) {
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int64_t LHSv = LHSi->getValue(), RHSv = RHSi->getValue();
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int64_t Result;
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@ -1,6 +1,16 @@
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// RUN: llvm-tblgen %s | FileCheck %s
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// XFAIL: vg_leak
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def shifts {
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bits<2> b = 0b10;
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int i = 2;
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int shifted_b = !shl(b, 2);
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int shifted_i = !shl(i, 2);
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}
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// CHECK: def shifts
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// CHECK: shifted_b = 8
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// CHECK: shifted_i = 8
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class Int<int value> {
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int Value = value;
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}
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