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synced 2024-08-23 17:29:19 +00:00
Rearrange some stuff in MachineOperand and add a new TargetFlags field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74087 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -47,7 +47,14 @@ public:
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private:
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/// OpKind - Specify what kind of operand this is. This discriminates the
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/// union.
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MachineOperandType OpKind : 8;
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unsigned char OpKind; // MachineOperandType
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/// SubReg - Subregister number, only valid for MO_Register. A value of 0
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/// indicates the MO_Register has no subReg.
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unsigned char SubReg;
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/// TargetFlags - This is a set of target-specific operand flags.
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unsigned char TargetFlags;
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/// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
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/// operands.
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@ -73,10 +80,6 @@ private:
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/// model the GCC inline asm '&' constraint modifier.
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bool IsEarlyClobber : 1;
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/// SubReg - Subregister number, only valid for MO_Register. A value of 0
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/// indicates the MO_Register has no subReg.
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unsigned char SubReg;
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/// ParentMI - This is the instruction that this operand is embedded into.
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/// This is valid for all operand types, when the operand is in an instr.
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MachineInstr *ParentMI;
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@ -105,7 +108,9 @@ private:
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} OffsetedInfo;
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} Contents;
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explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
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explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
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TargetFlags = 0;
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}
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public:
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MachineOperand(const MachineOperand &M) {
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*this = M;
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@ -115,7 +120,12 @@ public:
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/// getType - Returns the MachineOperandType for this operand.
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///
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MachineOperandType getType() const { return OpKind; }
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MachineOperandType getType() const { return (MachineOperandType)OpKind; }
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unsigned char getTargetFlags() const { return TargetFlags; }
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void setTargetFlags(unsigned char F) { TargetFlags = F; }
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void addTargetFlag(unsigned char F) { TargetFlags |= F; }
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/// getParent - Return the instruction that this operand belongs to.
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///
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@ -404,6 +414,7 @@ public:
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SubReg = MO.SubReg;
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ParentMI = MO.ParentMI;
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Contents = MO.Contents;
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TargetFlags = MO.TargetFlags;
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return *this;
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}
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@ -150,7 +150,9 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
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/// isIdenticalTo - Return true if this operand is identical to the specified
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/// operand.
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bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
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if (getType() != Other.getType()) return false;
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if (getType() != Other.getType() ||
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getTargetFlags() != Other.getTargetFlags())
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return false;
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switch (getType()) {
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default: assert(0 && "Unrecognized operand type");
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@ -205,70 +207,72 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
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}
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if (getSubReg() != 0) {
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OS << ":" << getSubReg();
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OS << ':' << getSubReg();
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}
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if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) {
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OS << "<";
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OS << '<';
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bool NeedComma = false;
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if (isImplicit()) {
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if (NeedComma) OS << ",";
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if (NeedComma) OS << ',';
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OS << (isDef() ? "imp-def" : "imp-use");
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NeedComma = true;
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} else if (isDef()) {
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if (NeedComma) OS << ",";
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if (NeedComma) OS << ',';
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if (isEarlyClobber())
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OS << "earlyclobber,";
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OS << "def";
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NeedComma = true;
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}
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if (isKill() || isDead()) {
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if (NeedComma) OS << ",";
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if (NeedComma) OS << ',';
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if (isKill()) OS << "kill";
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if (isDead()) OS << "dead";
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}
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OS << ">";
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OS << '>';
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}
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break;
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case MachineOperand::MO_Immediate:
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OS << getImm();
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break;
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case MachineOperand::MO_FPImmediate:
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if (getFPImm()->getType() == Type::FloatTy) {
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if (getFPImm()->getType() == Type::FloatTy)
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OS << getFPImm()->getValueAPF().convertToFloat();
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} else {
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else
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OS << getFPImm()->getValueAPF().convertToDouble();
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}
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << "mbb<"
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<< ((Value*)getMBB()->getBasicBlock())->getName()
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<< "," << (void*)getMBB() << ">";
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<< "," << (void*)getMBB() << '>';
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break;
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case MachineOperand::MO_FrameIndex:
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OS << "<fi#" << getIndex() << ">";
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OS << "<fi#" << getIndex() << '>';
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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OS << "<cp#" << getIndex();
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if (getOffset()) OS << "+" << getOffset();
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OS << ">";
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OS << '>';
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break;
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case MachineOperand::MO_JumpTableIndex:
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OS << "<jt#" << getIndex() << ">";
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OS << "<jt#" << getIndex() << '>';
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << "<ga:" << ((Value*)getGlobal())->getName();
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if (getOffset()) OS << "+" << getOffset();
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OS << ">";
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OS << '>';
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break;
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case MachineOperand::MO_ExternalSymbol:
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OS << "<es:" << getSymbolName();
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if (getOffset()) OS << "+" << getOffset();
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OS << ">";
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OS << '>';
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break;
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default:
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assert(0 && "Unrecognized operand type");
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}
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if (unsigned TF = getTargetFlags())
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OS << "[TF=" << TF << ']';
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}
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//===----------------------------------------------------------------------===//
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@ -1104,13 +1108,13 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
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// If not found, this means an alias of one of the operands is dead. Add a
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// new implicit operand if required.
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if (!Found && AddIfNotFound) {
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addOperand(MachineOperand::CreateReg(IncomingReg,
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true /*IsDef*/,
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true /*IsImp*/,
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false /*IsKill*/,
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true /*IsDead*/));
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return true;
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}
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return Found;
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if (Found || !AddIfNotFound)
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return Found;
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addOperand(MachineOperand::CreateReg(IncomingReg,
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true /*IsDef*/,
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true /*IsImp*/,
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false /*IsKill*/,
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true /*IsDead*/));
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return true;
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}
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