From 315d3341fd9386a55c9f9ca55e9e76ae3fecfb51 Mon Sep 17 00:00:00 2001
From: Misha Brukman <brukman+llvm@gmail.com>
Date: Thu, 14 Oct 2004 05:54:38 +0000
Subject: [PATCH] PowerPC instruction definitions use LittleEndian-style
 encoding [0..31]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPC32.td   | 2 ++
 lib/Target/PowerPC/PPC64.td   | 2 ++
 lib/Target/PowerPC/PowerPC.td | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/lib/Target/PowerPC/PPC32.td b/lib/Target/PowerPC/PPC32.td
index bd6afd9dc87..fb115f43129 100644
--- a/lib/Target/PowerPC/PPC32.td
+++ b/lib/Target/PowerPC/PPC32.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PPC32 : Target {
diff --git a/lib/Target/PowerPC/PPC64.td b/lib/Target/PowerPC/PPC64.td
index 264a261f368..06067ed1f41 100644
--- a/lib/Target/PowerPC/PPC64.td
+++ b/lib/Target/PowerPC/PPC64.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PPC64 : Target {
diff --git a/lib/Target/PowerPC/PowerPC.td b/lib/Target/PowerPC/PowerPC.td
index f556aeeae77..b7d5bf116f8 100644
--- a/lib/Target/PowerPC/PowerPC.td
+++ b/lib/Target/PowerPC/PowerPC.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PowerPC : Target {