From 31bbb5190b59fea4610c56010ac23711f3e3bef6 Mon Sep 17 00:00:00 2001 From: Alkis Evlogimenos Date: Mon, 16 Feb 2004 23:50:18 +0000 Subject: [PATCH] Add peephole optimizations for ADD [MEM], IMM8 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11511 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/PeepholeOptimizer.cpp | 3 +++ lib/Target/X86/X86PeepholeOpt.cpp | 3 +++ 2 files changed, 6 insertions(+) diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp index 42c985d2d63..accbdd6dccb 100644 --- a/lib/Target/X86/PeepholeOptimizer.cpp +++ b/lib/Target/X86/PeepholeOptimizer.cpp @@ -94,6 +94,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, return false; case X86::ADDri16: case X86::ADDri32: + case X86::ADDmi16: case X86::ADDmi32: case X86::SUBri16: case X86::SUBri32: case X86::ANDri16: case X86::ANDri32: case X86::ORri16: case X86::ORri32: @@ -108,6 +109,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, default: assert(0 && "Unknown opcode value!"); case X86::ADDri16: Opcode = X86::ADDri16b; break; case X86::ADDri32: Opcode = X86::ADDri32b; break; + case X86::ADDmi16: Opcode = X86::ADDmi16b; break; + case X86::ADDmi32: Opcode = X86::ADDmi32b; break; case X86::SUBri16: Opcode = X86::SUBri16b; break; case X86::SUBri32: Opcode = X86::SUBri32b; break; case X86::ANDri16: Opcode = X86::ANDri16b; break; diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp index 42c985d2d63..accbdd6dccb 100644 --- a/lib/Target/X86/X86PeepholeOpt.cpp +++ b/lib/Target/X86/X86PeepholeOpt.cpp @@ -94,6 +94,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, return false; case X86::ADDri16: case X86::ADDri32: + case X86::ADDmi16: case X86::ADDmi32: case X86::SUBri16: case X86::SUBri32: case X86::ANDri16: case X86::ANDri32: case X86::ORri16: case X86::ORri32: @@ -108,6 +109,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, default: assert(0 && "Unknown opcode value!"); case X86::ADDri16: Opcode = X86::ADDri16b; break; case X86::ADDri32: Opcode = X86::ADDri32b; break; + case X86::ADDmi16: Opcode = X86::ADDmi16b; break; + case X86::ADDmi32: Opcode = X86::ADDmi32b; break; case X86::SUBri16: Opcode = X86::SUBri16b; break; case X86::SUBri32: Opcode = X86::SUBri32b; break; case X86::ANDri16: Opcode = X86::ANDri16b; break;