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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-19 01:34:32 +00:00
wrap some long lines and expand i32 mul's to libcalls, inspired by a
patch by Mikael Lepisto! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57077 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3007,22 +3007,26 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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}
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}
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if (Node->getOpcode() == ISD::MULHS &&
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if (Node->getOpcode() == ISD::MULHS &&
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TLI.isOperationLegal(ISD::SMUL_LOHI, VT)) {
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TLI.isOperationLegal(ISD::SMUL_LOHI, VT)) {
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Result = SDValue(DAG.getNode(ISD::SMUL_LOHI, VTs, Tmp1, Tmp2).getNode(), 1);
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Result = SDValue(DAG.getNode(ISD::SMUL_LOHI, VTs, Tmp1, Tmp2).getNode(),
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1);
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break;
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break;
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}
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}
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if (Node->getOpcode() == ISD::MULHU &&
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if (Node->getOpcode() == ISD::MULHU &&
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TLI.isOperationLegal(ISD::UMUL_LOHI, VT)) {
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TLI.isOperationLegal(ISD::UMUL_LOHI, VT)) {
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Result = SDValue(DAG.getNode(ISD::UMUL_LOHI, VTs, Tmp1, Tmp2).getNode(), 1);
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Result = SDValue(DAG.getNode(ISD::UMUL_LOHI, VTs, Tmp1, Tmp2).getNode(),
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1);
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break;
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break;
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}
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}
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if (Node->getOpcode() == ISD::SDIV &&
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if (Node->getOpcode() == ISD::SDIV &&
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TLI.isOperationLegal(ISD::SDIVREM, VT)) {
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TLI.isOperationLegal(ISD::SDIVREM, VT)) {
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Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).getNode(), 0);
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Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).getNode(),
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0);
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break;
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break;
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}
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}
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if (Node->getOpcode() == ISD::UDIV &&
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if (Node->getOpcode() == ISD::UDIV &&
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TLI.isOperationLegal(ISD::UDIVREM, VT)) {
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TLI.isOperationLegal(ISD::UDIVREM, VT)) {
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Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).getNode(), 0);
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Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).getNode(),
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0);
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break;
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break;
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}
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}
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@ -3038,6 +3042,10 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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isSigned = Node->getOpcode() == ISD::SDIV;
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isSigned = Node->getOpcode() == ISD::SDIV;
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}
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}
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break;
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break;
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case ISD::MUL:
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if (VT == MVT::i32)
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LC = RTLIB::MUL_I32;
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break;
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case ISD::FPOW:
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case ISD::FPOW:
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LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80,
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LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80,
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RTLIB::POW_PPCF128);
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RTLIB::POW_PPCF128);
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