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Be more clever about calculating live variables through new basic blocks.
When splitting a critical edge, the registers live through the edge are: - Used in a PHI instruction, or - Live out from the predecessor, and - Live in to the successor. This allows the coalescer to eliminate even more phi joins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89530 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -107,6 +107,13 @@ public:
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/// findKill - Find a kill instruction in MBB. Return NULL if none is found.
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MachineInstr *findKill(const MachineBasicBlock *MBB) const;
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/// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
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/// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
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/// MBB, it is not considered live in.
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bool isLiveIn(const MachineBasicBlock &MBB,
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unsigned Reg,
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MachineRegisterInfo &MRI);
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void dump() const;
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};
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@ -267,11 +274,17 @@ public:
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void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
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MachineInstr *MI);
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/// addNewBlock - Add a new basic block BB as an empty succcessor to
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/// DomBB. All variables that are live out of DomBB will be marked as passing
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/// live through BB. This method assumes that the machine code is still in SSA
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/// form.
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void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB);
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bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) {
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return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
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}
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/// addNewBlock - Add a new basic block BB between DomBB and SuccBB. All
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/// variables that are live out of DomBB and live into SuccBB will be marked
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/// as passing live through BB. This method assumes that the machine code is
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/// still in SSA form.
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void addNewBlock(MachineBasicBlock *BB,
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MachineBasicBlock *DomBB,
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MachineBasicBlock *SuccBB);
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};
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} // End llvm namespace
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@ -656,35 +656,45 @@ void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
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.push_back(BBI->getOperand(i).getReg());
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}
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bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB,
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unsigned Reg,
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MachineRegisterInfo &MRI) {
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unsigned Num = MBB.getNumber();
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// Reg is live-through.
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if (AliveBlocks.test(Num))
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return true;
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// Registers defined in MBB cannot be live in.
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const MachineInstr *Def = MRI.getVRegDef(Reg);
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if (Def && Def->getParent() == &MBB)
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return false;
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// Reg was not defined in MBB, was it killed here?
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return findKill(&MBB);
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}
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/// addNewBlock - Add a new basic block BB as an empty succcessor to DomBB. All
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/// variables that are live out of DomBB will be marked as passing live through
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/// BB.
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void LiveVariables::addNewBlock(MachineBasicBlock *BB,
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MachineBasicBlock *DomBB) {
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MachineBasicBlock *DomBB,
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MachineBasicBlock *SuccBB) {
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const unsigned NumNew = BB->getNumber();
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const unsigned NumDom = DomBB->getNumber();
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// All registers used by PHI nodes in SuccBB must be live through BB.
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for (MachineBasicBlock::const_iterator BBI = SuccBB->begin(),
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BBE = SuccBB->end();
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BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
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if (BBI->getOperand(i+1).getMBB() == BB)
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getVarInfo(BBI->getOperand(i).getReg()).AliveBlocks.set(NumNew);
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// Update info for all live variables
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for (unsigned Reg = TargetRegisterInfo::FirstVirtualRegister,
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E = MRI->getLastVirtReg()+1; Reg != E; ++Reg) {
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VarInfo &VI = getVarInfo(Reg);
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// Anything live through DomBB is also live through BB.
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if (VI.AliveBlocks.test(NumDom)) {
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VI.AliveBlocks.set(NumNew);
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continue;
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}
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// Variables not defined in DomBB cannot be live out.
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const MachineInstr *Def = MRI->getVRegDef(Reg);
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if (!Def || Def->getParent() != DomBB)
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continue;
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// Killed by DomBB?
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if (VI.findKill(DomBB))
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continue;
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// This register is defined in DomBB and live out
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if (!VI.AliveBlocks.test(NumNew) && VI.isLiveIn(*SuccBB, Reg, *MRI))
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VI.AliveBlocks.set(NumNew);
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}
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}
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@ -353,7 +353,7 @@ bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
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// We break edges when registers are live out from the predecessor block
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// (not considering PHI nodes). If the register is live in to this block
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// anyway, we would gain nothing from splitting.
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if (isLiveOut(Reg, *PreMBB, LV) && !isLiveIn(Reg, MBB, LV))
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if (!LV.isLiveIn(Reg, MBB) && isLiveOut(Reg, *PreMBB, LV))
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SplitCriticalEdge(PreMBB, &MBB);
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}
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}
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@ -406,22 +406,6 @@ bool llvm::PHIElimination::isLiveOut(unsigned Reg, const MachineBasicBlock &MBB,
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return false;
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}
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bool llvm::PHIElimination::isLiveIn(unsigned Reg, const MachineBasicBlock &MBB,
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LiveVariables &LV) {
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LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
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if (VI.AliveBlocks.test(MBB.getNumber()))
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return true;
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// defined in MBB?
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const MachineInstr *Def = MRI->getVRegDef(Reg);
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if (Def && Def->getParent() == &MBB)
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return false;
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// killed in MBB?
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return VI.findKill(&MBB);
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}
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MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
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MachineBasicBlock *B) {
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assert(A && B && "Missing MBB end point");
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@ -463,7 +447,7 @@ MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
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i->getOperand(ni+1).setMBB(NMBB);
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if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>())
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LV->addNewBlock(NMBB, A);
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LV->addNewBlock(NMBB, A, B);
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if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>())
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MDT->addNewBlock(NMBB, A);
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@ -99,12 +99,6 @@ namespace llvm {
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bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB,
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LiveVariables &LV);
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/// isLiveIn - Determine if Reg is live in to MBB, not considering PHI
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/// source registers. This means that Reg is either killed by MBB or passes
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/// through it.
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bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB,
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LiveVariables &LV);
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/// SplitCriticalEdge - Split a critical edge from A to B by
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/// inserting a new MBB. Update branches in A and PHI instructions
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/// in B. Return the new block.
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