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Use regunit liveness in RegisterCoalescer when it is available.

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We only do very limited physreg coalescing now, but we still merge
virtual registers into reserved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158526 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-06-15 17:36:48 +00:00
parent aa7a2f2ba3
commit 324143d888
1 changed files with 21 additions and 13 deletions
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34
lib/CodeGen/RegisterCoalescer.cpp
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@ -870,7 +870,7 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
unsigned DstReg,
unsigned SubIdx) {
bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
LiveInterval &DstInt = LIS->getInterval(DstReg);
LiveInterval *DstInt = DstIsPhys ? 0 : &LIS->getInterval(DstReg);
// Update LiveDebugVariables.
LDV->renameRegister(SrcReg, DstReg, SubIdx);
@ -883,8 +883,8 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
// If SrcReg wasn't read, it may still be the case that DstReg is live-in
// because SrcReg is a sub-register.
if (!Reads && SubIdx)
Reads = DstInt.liveAt(LIS->getInstructionIndex(UseMI));
if (DstInt && !Reads && SubIdx)
Reads = DstInt->liveAt(LIS->getInstructionIndex(UseMI));
// Replace SrcReg with DstReg in all UseMI operands.
for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
@ -1102,16 +1102,24 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) {
// Deny any overlapping intervals. This depends on all the reserved
// register live ranges to look like dead defs.
for (MCRegAliasIterator AS(CP.getDstReg(), TRI, true); AS.isValid(); ++AS) {
if (!LIS->hasInterval(*AS)) {
// Make sure at least DstReg itself exists before attempting a join.
if (*AS == CP.getDstReg())
LIS->getOrCreateInterval(CP.getDstReg());
continue;
}
if (RHS.overlaps(LIS->getInterval(*AS))) {
DEBUG(dbgs() << "\t\tInterference: " << PrintReg(*AS, TRI) << '\n');
return false;
if (LIS->trackingRegUnits()) {
for (MCRegUnitIterator UI(CP.getDstReg(), TRI); UI.isValid(); ++UI)
if (RHS.overlaps(LIS->getRegUnit(*UI))) {
DEBUG(dbgs() << "\t\tInterference: " << PrintRegUnit(*UI, TRI) << '\n');
return false;
}
} else {
for (MCRegAliasIterator AS(CP.getDstReg(), TRI, true); AS.isValid(); ++AS) {
if (!LIS->hasInterval(*AS)) {
// Make sure at least DstReg itself exists before attempting a join.
if (*AS == CP.getDstReg())
LIS->getOrCreateInterval(CP.getDstReg());
continue;
}
if (RHS.overlaps(LIS->getInterval(*AS))) {
DEBUG(dbgs() << "\t\tInterference: " << PrintReg(*AS, TRI) << '\n');
return false;
}
}
}
// Skip any value computations, we are not adding new values to the