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Use DominatorTree instead of ETForest.

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This allows faster immediate domiantor walk.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37500 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2007-06-07 21:57:03 +00:00
parent b7d9dfc7ba
commit 326821ef12
5 changed files with 22 additions and 20 deletions
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4
include/llvm/Transforms/Utils/PromoteMemToReg.h
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@ -20,7 +20,7 @@
namespace llvm { namespace llvm {
class AllocaInst; class AllocaInst;
class ETForest; class DominatorTree;
class DominanceFrontier; class DominanceFrontier;
class AliasSetTracker; class AliasSetTracker;
@ -38,7 +38,7 @@ bool isAllocaPromotable(const AllocaInst *AI);
/// made to the IR. /// made to the IR.
/// ///
void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas, void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
ETForest &ET, DominanceFrontier &DF, DominatorTree &DT, DominanceFrontier &DF,
AliasSetTracker *AST = 0); AliasSetTracker *AST = 0);
} // End llvm namespace } // End llvm namespace

4
lib/Transforms/Scalar/LICM.cpp
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@ -565,7 +565,7 @@ void LICM::sink(Instruction &I) {
if (AI) { if (AI) {
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
Allocas.push_back(AI); Allocas.push_back(AI);
PromoteMemToReg(Allocas, *ET, *DF, CurAST); PromoteMemToReg(Allocas, *DT, *DF, CurAST);
} }
} }
} }
@ -746,7 +746,7 @@ void LICM::PromoteValuesInLoop() {
PromotedAllocas.reserve(PromotedValues.size()); PromotedAllocas.reserve(PromotedValues.size());
for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i) for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i)
PromotedAllocas.push_back(PromotedValues[i].first); PromotedAllocas.push_back(PromotedValues[i].first);
PromoteMemToReg(PromotedAllocas, *ET, *DF, CurAST); PromoteMemToReg(PromotedAllocas, *DT, *DF, CurAST);
} }
/// FindPromotableValuesInLoop - Check the current loop for stores to definite /// FindPromotableValuesInLoop - Check the current loop for stores to definite

6
lib/Transforms/Scalar/ScalarReplAggregates.cpp
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@ -58,7 +58,7 @@ namespace {
// getAnalysisUsage - This pass does not require any passes, but we know it // getAnalysisUsage - This pass does not require any passes, but we know it
// will not alter the CFG, so say so. // will not alter the CFG, so say so.
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<ETForest>(); AU.addRequired<DominatorTree>();
AU.addRequired<DominanceFrontier>(); AU.addRequired<DominanceFrontier>();
AU.addRequired<TargetData>(); AU.addRequired<TargetData>();
AU.setPreservesCFG(); AU.setPreservesCFG();
@ -138,7 +138,7 @@ bool SROA::runOnFunction(Function &F) {
bool SROA::performPromotion(Function &F) { bool SROA::performPromotion(Function &F) {
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
ETForest &ET = getAnalysis<ETForest>(); DominatorTree &DT = getAnalysis<DominatorTree>();
DominanceFrontier &DF = getAnalysis<DominanceFrontier>(); DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
@ -157,7 +157,7 @@ bool SROA::performPromotion(Function &F) {
if (Allocas.empty()) break; if (Allocas.empty()) break;
PromoteMemToReg(Allocas, ET, DF); PromoteMemToReg(Allocas, DT, DF);
NumPromoted += Allocas.size(); NumPromoted += Allocas.size();
Changed = true; Changed = true;
} }

6
lib/Transforms/Utils/Mem2Reg.cpp
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@ -38,7 +38,7 @@ namespace {
// getAnalysisUsage - We need dominance frontiers // getAnalysisUsage - We need dominance frontiers
// //
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<ETForest>(); AU.addRequired<DominatorTree>();
AU.addRequired<DominanceFrontier>(); AU.addRequired<DominanceFrontier>();
AU.setPreservesCFG(); AU.setPreservesCFG();
// This is a cluster of orthogonal Transforms // This is a cluster of orthogonal Transforms
@ -61,7 +61,7 @@ bool PromotePass::runOnFunction(Function &F) {
bool Changed = false; bool Changed = false;
ETForest &ET = getAnalysis<ETForest>(); DominatorTree &DT = getAnalysis<DominatorTree>();
DominanceFrontier &DF = getAnalysis<DominanceFrontier>(); DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
while (1) { while (1) {
@ -76,7 +76,7 @@ bool PromotePass::runOnFunction(Function &F) {
if (Allocas.empty()) break; if (Allocas.empty()) break;
PromoteMemToReg(Allocas, ET, DF); PromoteMemToReg(Allocas, DT, DF);
NumPromoted += Allocas.size(); NumPromoted += Allocas.size();
Changed = true; Changed = true;
} }

22
lib/Transforms/Utils/PromoteMemoryToRegister.cpp
View File

@ -88,7 +88,7 @@ namespace {
/// ///
std::vector<AllocaInst*> Allocas; std::vector<AllocaInst*> Allocas;
SmallVector<AllocaInst*, 16> &RetryList; SmallVector<AllocaInst*, 16> &RetryList;
ETForest &ET; DominatorTree &DT;
DominanceFrontier &DF; DominanceFrontier &DF;
/// AST - An AliasSetTracker object to update. If null, don't update it. /// AST - An AliasSetTracker object to update. If null, don't update it.
@ -126,9 +126,9 @@ namespace {
public: public:
PromoteMem2Reg(const std::vector<AllocaInst*> &A, PromoteMem2Reg(const std::vector<AllocaInst*> &A,
SmallVector<AllocaInst*, 16> &Retry, ETForest &et, SmallVector<AllocaInst*, 16> &Retry, DominatorTree &dt,
DominanceFrontier &df, AliasSetTracker *ast) DominanceFrontier &df, AliasSetTracker *ast)
: Allocas(A), RetryList(Retry), ET(et), DF(df), AST(ast) {} : Allocas(A), RetryList(Retry), DT(dt), DF(df), AST(ast) {}
void run(); void run();
@ -137,13 +137,13 @@ namespace {
bool properlyDominates(Instruction *I1, Instruction *I2) const { bool properlyDominates(Instruction *I1, Instruction *I2) const {
if (InvokeInst *II = dyn_cast<InvokeInst>(I1)) if (InvokeInst *II = dyn_cast<InvokeInst>(I1))
I1 = II->getNormalDest()->begin(); I1 = II->getNormalDest()->begin();
return ET.properlyDominates(I1->getParent(), I2->getParent()); return DT.properlyDominates(I1->getParent(), I2->getParent());
} }
/// dominates - Return true if BB1 dominates BB2 using the ETForest. /// dominates - Return true if BB1 dominates BB2 using the DominatorTree.
/// ///
bool dominates(BasicBlock *BB1, BasicBlock *BB2) const { bool dominates(BasicBlock *BB1, BasicBlock *BB2) const {
return ET.dominates(BB1, BB2); return DT.dominates(BB1, BB2);
} }
private: private:
@ -532,7 +532,9 @@ void PromoteMem2Reg::MarkDominatingPHILive(BasicBlock *BB, unsigned AllocaNum,
SmallPtrSet<PHINode*, 16> &DeadPHINodes) { SmallPtrSet<PHINode*, 16> &DeadPHINodes) {
// Scan the immediate dominators of this block looking for a block which has a // Scan the immediate dominators of this block looking for a block which has a
// PHI node for Alloca num. If we find it, mark the PHI node as being alive! // PHI node for Alloca num. If we find it, mark the PHI node as being alive!
for (BasicBlock* DomBB = BB; DomBB; DomBB = ET.getIDom(DomBB)) { DomTreeNode *IDomNode = DT.getNode(BB);
for (DomTreeNode *IDom = IDomNode; IDom; IDom = IDom->getIDom()) {
BasicBlock *DomBB = IDom->getBlock();
DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*>::iterator DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*>::iterator
I = NewPhiNodes.find(std::make_pair(DomBB, AllocaNum)); I = NewPhiNodes.find(std::make_pair(DomBB, AllocaNum));
if (I != NewPhiNodes.end()) { if (I != NewPhiNodes.end()) {
@ -803,13 +805,13 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
/// made to the IR. /// made to the IR.
/// ///
void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas, void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
ETForest &ET, DominanceFrontier &DF, DominatorTree &DT, DominanceFrontier &DF,
AliasSetTracker *AST) { AliasSetTracker *AST) {
// If there is nothing to do, bail out... // If there is nothing to do, bail out...
if (Allocas.empty()) return; if (Allocas.empty()) return;
SmallVector<AllocaInst*, 16> RetryList; SmallVector<AllocaInst*, 16> RetryList;
PromoteMem2Reg(Allocas, RetryList, ET, DF, AST).run(); PromoteMem2Reg(Allocas, RetryList, DT, DF, AST).run();
// PromoteMem2Reg may not have been able to promote all of the allocas in one // PromoteMem2Reg may not have been able to promote all of the allocas in one
// pass, run it again if needed. // pass, run it again if needed.
@ -827,7 +829,7 @@ void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
NewAllocas.assign(RetryList.begin(), RetryList.end()); NewAllocas.assign(RetryList.begin(), RetryList.end());
RetryList.clear(); RetryList.clear();
PromoteMem2Reg(NewAllocas, RetryList, ET, DF, AST).run(); PromoteMem2Reg(NewAllocas, RetryList, DT, DF, AST).run();
NewAllocas.clear(); NewAllocas.clear();
} }
} }