mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 03:29:40 +00:00
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92592 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Greene
parent
65de504ad2
commit
32edbd7454
@ -183,16 +183,16 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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for (const unsigned* SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR)
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if (li_->hasInterval(*SR) && IntA.overlaps(li_->getInterval(*SR))) {
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DEBUG({
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errs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(errs(), tri_);
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dbgs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(dbgs(), tri_);
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});
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return false;
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}
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}
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DEBUG({
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errs() << "\nExtending: ";
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IntB.print(errs(), tri_);
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dbgs() << "\nExtending: ";
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IntB.print(dbgs(), tri_);
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});
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SlotIndex FillerStart = ValLR->end, FillerEnd = BLR->start;
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@ -224,9 +224,9 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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IntB.MergeValueNumberInto(BValNo, ValLR->valno);
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}
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DEBUG({
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errs() << " result = ";
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IntB.print(errs(), tri_);
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errs() << "\n";
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dbgs() << " result = ";
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IntB.print(dbgs(), tri_);
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dbgs() << "\n";
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});
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// If the source instruction was killing the source register before the
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@ -467,8 +467,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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// We need to insert a new liverange: [ALR.start, LastUse). It may be we can
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// simply extend BLR if CopyMI doesn't end the range.
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DEBUG({
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errs() << "\nExtending: ";
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IntB.print(errs(), tri_);
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dbgs() << "\nExtending: ";
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IntB.print(dbgs(), tri_);
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});
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// Remove val#'s defined by copies that will be coalesced away.
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@ -518,19 +518,19 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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ValNo->setHasPHIKill(BHasPHIKill);
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DEBUG({
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errs() << " result = ";
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IntB.print(errs(), tri_);
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errs() << '\n';
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errs() << "\nShortening: ";
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IntA.print(errs(), tri_);
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dbgs() << " result = ";
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IntB.print(dbgs(), tri_);
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dbgs() << '\n';
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dbgs() << "\nShortening: ";
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IntA.print(dbgs(), tri_);
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});
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IntA.removeValNo(AValNo);
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DEBUG({
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errs() << " result = ";
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IntA.print(errs(), tri_);
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errs() << '\n';
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dbgs() << " result = ";
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IntA.print(dbgs(), tri_);
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dbgs() << '\n';
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});
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++numCommutes;
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@ -1223,16 +1223,16 @@ SimpleRegisterCoalescing::CanJoinExtractSubRegToPhysReg(unsigned DstReg,
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if (li_->hasInterval(RealDstReg) &&
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RHS.overlaps(li_->getInterval(RealDstReg))) {
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DEBUG({
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errs() << "Interfere with register ";
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li_->getInterval(RealDstReg).print(errs(), tri_);
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dbgs() << "Interfere with register ";
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li_->getInterval(RealDstReg).print(dbgs(), tri_);
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});
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return false; // Not coalescable
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}
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for (const unsigned* SR = tri_->getSubRegisters(RealDstReg); *SR; ++SR)
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if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
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DEBUG({
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errs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(errs(), tri_);
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dbgs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(dbgs(), tri_);
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});
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return false; // Not coalescable
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}
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@ -1254,16 +1254,16 @@ SimpleRegisterCoalescing::CanJoinInsertSubRegToPhysReg(unsigned DstReg,
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if (li_->hasInterval(RealSrcReg) &&
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RHS.overlaps(li_->getInterval(RealSrcReg))) {
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DEBUG({
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errs() << "Interfere with register ";
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li_->getInterval(RealSrcReg).print(errs(), tri_);
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dbgs() << "Interfere with register ";
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li_->getInterval(RealSrcReg).print(dbgs(), tri_);
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});
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return false; // Not coalescable
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}
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for (const unsigned* SR = tri_->getSubRegisters(RealSrcReg); *SR; ++SR)
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if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
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DEBUG({
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errs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(errs(), tri_);
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dbgs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(dbgs(), tri_);
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});
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return false; // Not coalescable
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}
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@ -1293,7 +1293,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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if (JoinedCopies.count(CopyMI) || ReMatCopies.count(CopyMI))
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return false; // Already done.
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DEBUG(errs() << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
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DEBUG(dbgs() << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
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unsigned SrcReg, DstReg, SrcSubIdx = 0, DstSubIdx = 0;
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bool isExtSubReg = CopyMI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG;
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@ -1313,7 +1313,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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if (SrcSubIdx && SrcSubIdx != DstSubIdx) {
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// r1025 = INSERT_SUBREG r1025, r1024<2>, 2 Then r1024 has already been
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// coalesced to a larger register so the subreg indices cancel out.
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DEBUG(errs() << "\tSource of insert_subreg or subreg_to_reg is already "
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DEBUG(dbgs() << "\tSource of insert_subreg or subreg_to_reg is already "
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"coalesced to another register.\n");
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return false; // Not coalescable.
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}
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@ -1329,7 +1329,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// If they are already joined we continue.
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if (SrcReg == DstReg) {
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DEBUG(errs() << "\tCopy already coalesced.\n");
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DEBUG(dbgs() << "\tCopy already coalesced.\n");
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return false; // Not coalescable.
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}
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@ -1338,17 +1338,17 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// If they are both physical registers, we cannot join them.
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if (SrcIsPhys && DstIsPhys) {
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DEBUG(errs() << "\tCan not coalesce physregs.\n");
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DEBUG(dbgs() << "\tCan not coalesce physregs.\n");
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return false; // Not coalescable.
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}
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// We only join virtual registers with allocatable physical registers.
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if (SrcIsPhys && !allocatableRegs_[SrcReg]) {
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DEBUG(errs() << "\tSrc reg is unallocatable physreg.\n");
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DEBUG(dbgs() << "\tSrc reg is unallocatable physreg.\n");
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return false; // Not coalescable.
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}
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if (DstIsPhys && !allocatableRegs_[DstReg]) {
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DEBUG(errs() << "\tDst reg is unallocatable physreg.\n");
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DEBUG(dbgs() << "\tDst reg is unallocatable physreg.\n");
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return false; // Not coalescable.
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}
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@ -1362,7 +1362,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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DstSubRC = DstRC->getSubRegisterRegClass(DstSubIdx);
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assert(DstSubRC && "Illegal subregister index");
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if (!DstSubRC->contains(SrcSubReg)) {
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DEBUG(errs() << "\tIncompatible destination regclass: "
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DEBUG(dbgs() << "\tIncompatible destination regclass: "
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<< tri_->getName(SrcSubReg) << " not in "
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<< DstSubRC->getName() << ".\n");
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return false; // Not coalescable.
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@ -1379,7 +1379,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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SrcSubRC = SrcRC->getSubRegisterRegClass(SrcSubIdx);
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assert(SrcSubRC && "Illegal subregister index");
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if (!SrcSubRC->contains(DstSubReg)) {
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DEBUG(errs() << "\tIncompatible source regclass: "
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DEBUG(dbgs() << "\tIncompatible source regclass: "
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<< tri_->getName(DstSubReg) << " not in "
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<< SrcSubRC->getName() << ".\n");
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(void)DstSubReg;
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@ -1405,7 +1405,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// r1024<2> = EXTRACT_SUBREG EAX, 2. Then r1024 has already been
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// coalesced to a larger register so the subreg indices cancel out.
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if (DstSubIdx != SubIdx) {
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DEBUG(errs() << "\t Sub-register indices mismatch.\n");
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DEBUG(dbgs() << "\t Sub-register indices mismatch.\n");
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return false; // Not coalescable.
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}
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} else
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@ -1418,7 +1418,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// EAX = INSERT_SUBREG EAX, r1024<2>, 2 Then r1024 has already been
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// coalesced to a larger register so the subreg indices cancel out.
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if (SrcSubIdx != SubIdx) {
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DEBUG(errs() << "\t Sub-register indices mismatch.\n");
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DEBUG(dbgs() << "\t Sub-register indices mismatch.\n");
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return false; // Not coalescable.
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}
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} else
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@ -1427,7 +1427,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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} else if ((DstIsPhys && isExtSubReg) ||
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(SrcIsPhys && (isInsSubReg || isSubRegToReg))) {
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if (!isSubRegToReg && CopyMI->getOperand(1).getSubReg()) {
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DEBUG(errs() << "\tSrc of extract_subreg already coalesced with reg"
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DEBUG(dbgs() << "\tSrc of extract_subreg already coalesced with reg"
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<< " of a super-class.\n");
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return false; // Not coalescable.
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}
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@ -1451,7 +1451,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// class as the would be resulting register.
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SubIdx = 0;
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else {
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DEBUG(errs() << "\t Sub-register indices mismatch.\n");
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DEBUG(dbgs() << "\t Sub-register indices mismatch.\n");
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return false; // Not coalescable.
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}
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}
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@ -1463,7 +1463,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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NewRC = tri_->getMatchingSuperRegClass(SrcRC, DstRC, SubIdx);
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}
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if (!NewRC) {
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DEBUG(errs() << "\t Conflicting sub-register indices.\n");
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DEBUG(dbgs() << "\t Conflicting sub-register indices.\n");
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return false; // Not coalescable
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}
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@ -1535,7 +1535,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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} else if (!SrcIsPhys && !DstIsPhys) {
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NewRC = getCommonSubClass(SrcRC, DstRC);
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if (!NewRC) {
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DEBUG(errs() << "\tDisjoint regclasses: "
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DEBUG(dbgs() << "\tDisjoint regclasses: "
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<< SrcRC->getName() << ", "
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<< DstRC->getName() << ".\n");
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return false; // Not coalescable.
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@ -1551,7 +1551,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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(isExtSubReg || DstRC->isASubClass()) &&
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!isWinToJoinCrossClass(LargeReg, SmallReg,
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allocatableRCRegs_[NewRC].count())) {
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DEBUG(errs() << "\tSrc/Dest are different register classes.\n");
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DEBUG(dbgs() << "\tSrc/Dest are different register classes.\n");
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// Allow the coalescer to try again in case either side gets coalesced to
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// a physical register that's compatible with the other side. e.g.
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// r1024 = MOV32to32_ r1025
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@ -1573,9 +1573,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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"Register mapping is horribly broken!");
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DEBUG({
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errs() << "\t\tInspecting "; SrcInt.print(errs(), tri_);
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errs() << " and "; DstInt.print(errs(), tri_);
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errs() << ": ";
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dbgs() << "\t\tInspecting "; SrcInt.print(dbgs(), tri_);
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dbgs() << " and "; DstInt.print(dbgs(), tri_);
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dbgs() << ": ";
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});
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// Save a copy of the virtual register live interval. We'll manually
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@ -1606,7 +1606,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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if (!isWinToJoinVRWithSrcPhysReg(CopyMI, CopyMBB, DstInt, SrcInt)) {
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mri_->setRegAllocationHint(DstInt.reg, 0, SrcReg);
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++numAborts;
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DEBUG(errs() << "\tMay tie down a physical register, abort!\n");
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DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n");
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Again = true; // May be possible to coalesce later.
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return false;
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}
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@ -1614,7 +1614,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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if (!isWinToJoinVRWithDstPhysReg(CopyMI, CopyMBB, DstInt, SrcInt)) {
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mri_->setRegAllocationHint(SrcInt.reg, 0, DstReg);
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++numAborts;
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DEBUG(errs() << "\tMay tie down a physical register, abort!\n");
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DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n");
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Again = true; // May be possible to coalesce later.
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return false;
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}
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@ -1635,7 +1635,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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mri_->use_end()) / Length) < Ratio)) {
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mri_->setRegAllocationHint(JoinVInt.reg, 0, JoinPReg);
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++numAborts;
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DEBUG(errs() << "\tMay tie down a physical register, abort!\n");
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DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n");
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Again = true; // May be possible to coalesce later.
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return false;
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}
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@ -1654,7 +1654,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// Only coalesce an empty interval (defined by implicit_def) with
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// another interval which has a valno defined by the CopyMI and the CopyMI
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// is a kill of the implicit def.
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DEBUG(errs() << "Not profitable!\n");
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DEBUG(dbgs() << "Not profitable!\n");
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return false;
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}
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@ -1676,7 +1676,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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}
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// Otherwise, we are unable to join the intervals.
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DEBUG(errs() << "Interference!\n");
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DEBUG(dbgs() << "Interference!\n");
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Again = true; // May be possible to coalesce later.
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return false;
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}
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@ -1779,9 +1779,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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}
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DEBUG({
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errs() << "\n\t\tJoined. Result = ";
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ResDstInt->print(errs(), tri_);
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errs() << "\n";
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dbgs() << "\n\t\tJoined. Result = ";
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ResDstInt->print(dbgs(), tri_);
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dbgs() << "\n";
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});
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++numJoins;
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@ -2134,8 +2134,8 @@ SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS,
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for (const unsigned* SR = tri_->getSubRegisters(LHS.reg); *SR; ++SR)
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if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
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DEBUG({
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errs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(errs(), tri_);
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dbgs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(dbgs(), tri_);
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});
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return false;
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}
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@ -2151,8 +2151,8 @@ SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS,
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for (const unsigned* SR = tri_->getSubRegisters(RHS.reg); *SR; ++SR)
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if (li_->hasInterval(*SR) && LHS.overlaps(li_->getInterval(*SR))) {
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DEBUG({
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errs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(errs(), tri_);
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dbgs() << "Interfere with sub-register ";
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li_->getInterval(*SR).print(dbgs(), tri_);
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});
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return false;
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}
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@ -2413,7 +2413,7 @@ namespace {
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void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB,
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std::vector<CopyRec> &TryAgain) {
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DEBUG(errs() << MBB->getName() << ":\n");
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DEBUG(dbgs() << MBB->getName() << ":\n");
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std::vector<CopyRec> VirtCopies;
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std::vector<CopyRec> PhysCopies;
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@ -2478,7 +2478,7 @@ void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB,
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}
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void SimpleRegisterCoalescing::joinIntervals() {
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DEBUG(errs() << "********** JOINING INTERVALS ***********\n");
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DEBUG(dbgs() << "********** JOINING INTERVALS ***********\n");
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std::vector<CopyRec> TryAgainList;
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if (loopInfo->empty()) {
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@ -2610,12 +2610,11 @@ SimpleRegisterCoalescing::lastRegisterUse(SlotIndex Start,
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return NULL;
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}
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void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
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if (TargetRegisterInfo::isPhysicalRegister(reg))
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errs() << tri_->getName(reg);
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dbgs() << tri_->getName(reg);
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else
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errs() << "%reg" << reg;
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dbgs() << "%reg" << reg;
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}
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void SimpleRegisterCoalescing::releaseMemory() {
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@ -2634,7 +2633,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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AA = &getAnalysis<AliasAnalysis>();
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loopInfo = &getAnalysis<MachineLoopInfo>();
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DEBUG(errs() << "********** SIMPLE REGISTER COALESCING **********\n"
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DEBUG(dbgs() << "********** SIMPLE REGISTER COALESCING **********\n"
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<< "********** Function: "
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<< ((Value*)mf_->getFunction())->getName() << '\n');
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@ -2648,11 +2647,11 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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if (EnableJoining) {
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joinIntervals();
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DEBUG({
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errs() << "********** INTERVALS POST JOINING **********\n";
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dbgs() << "********** INTERVALS POST JOINING **********\n";
|
||||
for (LiveIntervals::iterator I = li_->begin(), E = li_->end();
|
||||
I != E; ++I){
|
||||
I->second->print(errs(), tri_);
|
||||
errs() << "\n";
|
||||
I->second->print(dbgs(), tri_);
|
||||
dbgs() << "\n";
|
||||
}
|
||||
});
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user