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Fix the pattern for VADDUWM, add i32 splat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26901 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -972,7 +972,7 @@ def VADDFP : VXForm_1<10, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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[(set VRRC:$vD, (fadd VRRC:$vA, VRRC:$vB))]>;
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def VADDUWM : VXForm_1<128, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vadduwm $vD, $vA, $vB", VecGeneral,
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[(set VRRC:$vD, (add VRRC:$vA, VRRC:$vB))]>;
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[(set VRRC:$vD, (add (v4i32 VRRC:$vA), VRRC:$vB))]>;
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def VCFSX : VXForm_1<842, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB),
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"vcfsx $vD, $vB, $UIMM", VecFP,
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[]>;
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@ -1178,6 +1178,9 @@ def : Pat<(v16i8 (load xoaddr:$src)),
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(v16i8 (LVX xoaddr:$src))>;
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def : Pat<(vector_shuffle (v4i32 VRRC:$vB), (undef), VSPLT_shuffle_mask:$UIMM),
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(v4i32 (VSPLTW VSPLT_shuffle_mask:$UIMM, VRRC:$vB))>;
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def : Pat<(PPCvperm (v4i32 VRRC:$vA), VRRC:$vB, VRRC:$vC),
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(v4i32 (VPERM VRRC:$vA, VRRC:$vB, VRRC:$vC))>;
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