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Implement the getRegForInlineAsmConstraint method for PPC. With recent

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sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31367 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-11-02 01:44:04 +00:00
parent 2a821601f1
commit 331d1bc5df
2 changed files with 29 additions and 56 deletions
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10
lib/Target/PowerPC/PPCISelLowering.h
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@@ -18,6 +18,7 @@
#include "llvm/Target/TargetLowering.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "PPC.h"
#include "PPCSubtarget.h"
namespace llvm {
namespace PPCISD {
@@ -168,8 +169,9 @@ namespace llvm {
class PPCTargetLowering : public TargetLowering {
int VarArgsFrameIndex; // FrameIndex for start of varargs area.
int ReturnAddrIndex; // FrameIndex for return slot.
const PPCSubtarget &PPCSubTarget;
public:
PPCTargetLowering(TargetMachine &TM);
PPCTargetLowering(PPCTargetMachine &TM);
/// getTargetNodeName() - This method returns the name of a target specific
/// DAG node.
@@ -191,9 +193,9 @@ namespace llvm {
MachineBasicBlock *MBB);
ConstraintType getConstraintType(char ConstraintLetter) const;
std::vector<unsigned>
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
std::pair<unsigned, const TargetRegisterClass*>
getRegForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
SDOperand isOperandValidForConstraint(SDOperand Op, char ConstraintLetter,
SelectionDAG &DAG);