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Allow trailing physreg RegisterSDNode operands on non-variadic instructions.

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Also allow trailing register mask operands on non-variadic both
MachineSDNodes and MachineInstrs.

The extra physreg RegisterSDNode operands are added to the MI as
<imp-use> operands. This makes it possible to have non-variadic call
instructions.

Call and return instructions really are non-variadic, the argument
registers should only be used implicitly - they are not part of the
encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159727 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-07-04 23:53:23 +00:00
parent 9389ec7375
commit 33a537a5c4
3 changed files with 30 additions and 14 deletions
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6
lib/CodeGen/SelectionDAG/InstrEmitter.h
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@@ -105,12 +105,6 @@ public:
/// (which do not go into the machine instrs.)
static unsigned CountResults(SDNode *Node);
/// CountOperands - The inputs to target nodes have any actual inputs first,
/// followed by an optional chain operand, then flag operands. Compute
/// the number of actual operands that will go into the resulting
/// MachineInstr.
static unsigned CountOperands(SDNode *Node);
/// EmitDbgValue - Generate machine instruction for a dbg_value node.
///
MachineInstr *EmitDbgValue(SDDbgValue *SD,