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Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2013-08-21 03:57:57 +00:00
parent d5a2eb0925
commit 33b5fe7f16
3 changed files with 7 additions and 7 deletions
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8
lib/Target/X86/X86.td
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@ -86,16 +86,16 @@ def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2", def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2",
"Enable AVX2 instructions", "Enable AVX2 instructions",
[FeatureAVX]>; [FeatureAVX]>;
def FeatureAVX512 : SubtargetFeature<"avx-512", "X86SSELevel", "AVX512", def FeatureAVX512 : SubtargetFeature<"avx512f", "X86SSELevel", "AVX512F",
"Enable AVX-512 instructions", "Enable AVX-512 instructions",
[FeatureAVX2]>; [FeatureAVX2]>;
def FeatureERI : SubtargetFeature<"avx-512-eri", "HasERI", "true", def FeatureERI : SubtargetFeature<"avx512er", "HasERI", "true",
"Enable AVX-512 Exponential and Reciprocal Instructions", "Enable AVX-512 Exponential and Reciprocal Instructions",
[FeatureAVX512]>; [FeatureAVX512]>;
def FeatureCDI : SubtargetFeature<"avx-512-cdi", "HasCDI", "true", def FeatureCDI : SubtargetFeature<"avx512cd", "HasCDI", "true",
"Enable AVX-512 Conflict Detection Instructions", "Enable AVX-512 Conflict Detection Instructions",
[FeatureAVX512]>; [FeatureAVX512]>;
def FeaturePFI : SubtargetFeature<"avx-512-pfi", "HasPFI", "true", def FeaturePFI : SubtargetFeature<"avx512pf", "HasPFI", "true",
"Enable AVX-512 PreFetch Instructions", "Enable AVX-512 PreFetch Instructions",
[FeatureAVX512]>; [FeatureAVX512]>;

2
lib/Target/X86/X86Subtarget.cpp
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@ -352,7 +352,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
ToggleFeature(X86::FeatureRTM); ToggleFeature(X86::FeatureRTM);
} }
if (IsIntel && ((EBX >> 16) & 0x1)) { if (IsIntel && ((EBX >> 16) & 0x1)) {
X86SSELevel = AVX512; X86SSELevel = AVX512F;
ToggleFeature(X86::FeatureAVX512); ToggleFeature(X86::FeatureAVX512);
} }
if (IsIntel && ((EBX >> 18) & 0x1)) { if (IsIntel && ((EBX >> 18) & 0x1)) {

4
lib/Target/X86/X86Subtarget.h
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@ -42,7 +42,7 @@ enum Style {
class X86Subtarget : public X86GenSubtargetInfo { class X86Subtarget : public X86GenSubtargetInfo {
protected: protected:
enum X86SSEEnum { enum X86SSEEnum {
NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
}; };
enum X863DNowEnum { enum X863DNowEnum {
@ -258,7 +258,7 @@ public:
bool hasSSE42() const { return X86SSELevel >= SSE42; } bool hasSSE42() const { return X86SSELevel >= SSE42; }
bool hasAVX() const { return X86SSELevel >= AVX; } bool hasAVX() const { return X86SSELevel >= AVX; }
bool hasAVX2() const { return X86SSELevel >= AVX2; } bool hasAVX2() const { return X86SSELevel >= AVX2; }
bool hasAVX512() const { return X86SSELevel >= AVX512; } bool hasAVX512() const { return X86SSELevel >= AVX512F; }
bool hasFp256() const { return hasAVX(); } bool hasFp256() const { return hasAVX(); }
bool hasInt256() const { return hasAVX2(); } bool hasInt256() const { return hasAVX2(); }
bool hasSSE4A() const { return HasSSE4A; } bool hasSSE4A() const { return HasSSE4A; }