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Remove the 's' DataLayout specification
During the years there have been some attempts at figuring out how to align byval arguments. A look at the commit log suggests that they were * Use the ABI alignment. * When that was not sufficient for x86-64, I added the 's' specification to DataLayout. * When that was not sufficient Evan added the virtual getByValTypeAlignment. * When even that was not sufficient, we just got the FE to add the alignment to the byval. This patch is just a simple cleanup that removes my first attempt at fixing the problem. I also added an AArch64 implementation of getByValTypeAlignment to make sure this patch is a nop. I also left the 's' parsing for backward compatibility. I will send a short email to llvmdev about the change for anyone maintaining an out of tree target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198287 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1160,9 +1160,6 @@ as follows:
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``a<size>:<abi>:<pref>``
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``a<size>:<abi>:<pref>``
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This specifies the alignment for an aggregate type of a given bit
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This specifies the alignment for an aggregate type of a given bit
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``<size>``.
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``<size>``.
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``s<size>:<abi>:<pref>``
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This specifies the alignment for a stack object of a given bit
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``<size>``.
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``n<size1>:<size2>:<size3>...``
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``n<size1>:<size2>:<size3>...``
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This specifies a set of native integer widths for the target CPU in
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This specifies a set of native integer widths for the target CPU in
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bits. For example, it might contain ``n32`` for 32-bit PowerPC,
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bits. For example, it might contain ``n32`` for 32-bit PowerPC,
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@ -45,8 +45,7 @@ enum AlignTypeEnum {
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INTEGER_ALIGN = 'i', ///< Integer type alignment
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INTEGER_ALIGN = 'i', ///< Integer type alignment
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VECTOR_ALIGN = 'v', ///< Vector type alignment
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VECTOR_ALIGN = 'v', ///< Vector type alignment
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FLOAT_ALIGN = 'f', ///< Floating point type alignment
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FLOAT_ALIGN = 'f', ///< Floating point type alignment
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AGGREGATE_ALIGN = 'a', ///< Aggregate alignment
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AGGREGATE_ALIGN = 'a' ///< Aggregate alignment
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STACK_ALIGN = 's' ///< Stack objects alignment
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};
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};
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/// Layout alignment element.
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/// Layout alignment element.
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@ -344,10 +343,6 @@ public:
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/// an integer type of the specified bitwidth.
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/// an integer type of the specified bitwidth.
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unsigned getABIIntegerTypeAlignment(unsigned BitWidth) const;
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unsigned getABIIntegerTypeAlignment(unsigned BitWidth) const;
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/// getCallFrameTypeAlignment - Return the minimum ABI-required alignment
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/// for the specified type when it is part of a call frame.
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unsigned getCallFrameTypeAlignment(Type *Ty) const;
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/// getPrefTypeAlignment - Return the preferred stack/global alignment for
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/// getPrefTypeAlignment - Return the preferred stack/global alignment for
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/// the specified type. This is always at least as good as the ABI alignment.
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/// the specified type. This is always at least as good as the ABI alignment.
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unsigned getPrefTypeAlignment(Type *Ty) const;
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unsigned getPrefTypeAlignment(Type *Ty) const;
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@ -1285,7 +1285,7 @@ void llvm::GetReturnInfo(Type* ReturnType, AttributeSet attr,
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/// function arguments in the caller parameter area. This is the actual
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/// function arguments in the caller parameter area. This is the actual
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/// alignment, not its logarithm.
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/// alignment, not its logarithm.
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unsigned TargetLoweringBase::getByValTypeAlignment(Type *Ty) const {
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unsigned TargetLoweringBase::getByValTypeAlignment(Type *Ty) const {
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return TD->getCallFrameTypeAlignment(Ty);
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return TD->getABITypeAlignment(Ty);
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -225,6 +225,10 @@ void DataLayout::parseSpecifier(StringRef Desc) {
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Tok = Tok.substr(1);
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Tok = Tok.substr(1);
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switch (Specifier) {
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switch (Specifier) {
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case 's':
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// Ignored for backward compatibility.
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// FIXME: remove this on LLVM 4.0.
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break;
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case 'E':
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case 'E':
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LittleEndian = false;
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LittleEndian = false;
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break;
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break;
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@ -259,8 +263,7 @@ void DataLayout::parseSpecifier(StringRef Desc) {
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case 'i':
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case 'i':
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case 'v':
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case 'v':
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case 'f':
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case 'f':
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case 'a':
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case 'a': {
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case 's': {
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AlignTypeEnum AlignType;
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AlignTypeEnum AlignType;
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switch (Specifier) {
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switch (Specifier) {
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default:
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default:
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@ -268,7 +271,6 @@ void DataLayout::parseSpecifier(StringRef Desc) {
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case 'v': AlignType = VECTOR_ALIGN; break;
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case 'v': AlignType = VECTOR_ALIGN; break;
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case 'f': AlignType = FLOAT_ALIGN; break;
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case 'f': AlignType = FLOAT_ALIGN; break;
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case 'a': AlignType = AGGREGATE_ALIGN; break;
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case 'a': AlignType = AGGREGATE_ALIGN; break;
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case 's': AlignType = STACK_ALIGN; break;
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}
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}
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// Bit size.
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// Bit size.
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@ -617,14 +619,6 @@ unsigned DataLayout::getABIIntegerTypeAlignment(unsigned BitWidth) const {
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return getAlignmentInfo(INTEGER_ALIGN, BitWidth, true, 0);
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return getAlignmentInfo(INTEGER_ALIGN, BitWidth, true, 0);
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}
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}
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unsigned DataLayout::getCallFrameTypeAlignment(Type *Ty) const {
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for (unsigned i = 0, e = Alignments.size(); i != e; ++i)
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if (Alignments[i].AlignType == STACK_ALIGN)
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return Alignments[i].ABIAlign;
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return getABITypeAlignment(Ty);
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}
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unsigned DataLayout::getPrefTypeAlignment(Type *Ty) const {
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unsigned DataLayout::getPrefTypeAlignment(Type *Ty) const {
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return getAlignment(Ty, false);
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return getAlignment(Ty, false);
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}
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}
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@ -1346,6 +1346,12 @@ AArch64TargetLowering::LowerReturn(SDValue Chain,
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&RetOps[0], RetOps.size());
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&RetOps[0], RetOps.size());
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}
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}
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unsigned AArch64TargetLowering::getByValTypeAlignment(Type *Ty) const {
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// This is a new backend. For anything more precise than this a FE should
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// set an explicit alignment.
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return 4;
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}
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SDValue
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SDValue
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AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
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AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const {
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SmallVectorImpl<SDValue> &InVals) const {
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@ -221,6 +221,8 @@ public:
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const SmallVectorImpl<SDValue> &OutVals,
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const SmallVectorImpl<SDValue> &OutVals,
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SDLoc dl, SelectionDAG &DAG) const;
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SDLoc dl, SelectionDAG &DAG) const;
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virtual unsigned getByValTypeAlignment(Type *Ty) const LLVM_OVERRIDE;
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SDValue LowerCall(CallLoweringInfo &CLI,
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SDValue LowerCall(CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const;
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SmallVectorImpl<SDValue> &InVals) const;
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@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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Subtarget(TT, CPU, FS),
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Subtarget(TT, CPU, FS),
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InstrInfo(Subtarget),
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InstrInfo(Subtarget),
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DL("e-i64:64-i128:128-s:32-n32:64-S128"),
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DL("e-i64:64-i128:128-n32:64-S128"),
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TLInfo(*this),
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TLInfo(*this),
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TSInfo(*this),
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TSInfo(*this),
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FrameLowering(Subtarget) {
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FrameLowering(Subtarget) {
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@ -113,7 +113,7 @@ unsigned LLVMABIAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
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}
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}
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unsigned LLVMCallFrameAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
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unsigned LLVMCallFrameAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
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return unwrap(TD)->getCallFrameTypeAlignment(unwrap(Ty));
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return unwrap(TD)->getABITypeAlignment(unwrap(Ty));
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}
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}
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unsigned LLVMPreferredAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
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unsigned LLVMPreferredAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
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@ -53,10 +53,6 @@ static std::string computeDataLayout(const X86Subtarget &ST) {
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else
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else
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Ret += "-f80:32";
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Ret += "-f80:32";
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// Objects on the stack ore aligned to 64 bits.
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if (ST.is64Bit())
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Ret += "-s:64";
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// The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
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// The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
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if (ST.is64Bit())
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if (ST.is64Bit())
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Ret += "-n8:16:32:64";
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Ret += "-n8:16:32:64";
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