Move the Imp tblgen class from the X86 backend to common code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30907 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-10-12 17:49:27 +00:00
parent 6ec3626be4
commit 33e4869ba0
2 changed files with 7 additions and 5 deletions

View File

@ -173,6 +173,13 @@ class Instruction {
InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
}
/// Imp - Helper class for specifying the implicit uses/defs set for an
/// instruction.
class Imp<list<Register> uses, list<Register> defs> {
list<Register> Uses = uses;
list<Register> Defs = defs;
}
/// Predicates - These are extra conditionals which are turned into instruction
/// selector matching code. Currently each predicate is just a string.
class Predicate<string cond> {

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@ -228,11 +228,6 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr>
bits<3> FPFormBits = 0;
}
class Imp<list<Register> uses, list<Register> defs> {
list<Register> Uses = uses;
list<Register> Defs = defs;
}
// Prefix byte classes which are used to indicate to the ad-hoc machine code
// emitter that various prefix bytes are required.