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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2011-08-10 00:03:03 +00:00
parent 8c09e2a701
commit 33e57515b1
8 changed files with 118 additions and 101 deletions
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8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -1177,10 +1177,10 @@ static bool DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn,
if (pred == 0xF)
return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
DecodeGPRRegisterClass(Inst, Rd, Address, Decoder);
DecodeGPRRegisterClass(Inst, Rn, Address, Decoder);
DecodeGPRRegisterClass(Inst, Rm, Address, Decoder);
DecodeGPRRegisterClass(Inst, Ra, Address, Decoder);
DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder);
DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder);
DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder);
DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder);
return true;
}