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In thumb mode, r7 is used as frame register. This fixes pr4681.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -160,6 +160,13 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6,
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ARM::R4, ARM::R5, ARM::R6,
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ARM::R8, ARM::R10,ARM::R11,
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ARM::R7 };
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// FP is R7, R9 is available as callee-saved register.
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// This is used by non-Darwin platform in Thumb mode.
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static const unsigned ARM_GPR_AO_5[] = {
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ARM::R0, ARM::R1, ARM::R2, ARM::R3,
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ARM::R12,ARM::LR,
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ARM::R4, ARM::R5, ARM::R6,
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ARM::R8, ARM::R9, ARM::R10,ARM::R11,ARM::R7 };
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GPRClass::iterator
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GPRClass::allocation_order_begin(const MachineFunction &MF) const {
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@ -173,6 +180,8 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6,
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} else {
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if (Subtarget.isR9Reserved())
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return ARM_GPR_AO_2;
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else if (Subtarget.isThumb())
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return ARM_GPR_AO_5;
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else
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return ARM_GPR_AO_1;
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}
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@ -193,6 +202,8 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6,
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} else {
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if (Subtarget.isR9Reserved())
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I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned));
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else if (Subtarget.isThumb())
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I = ARM_GPR_AO_5 + (sizeof(ARM_GPR_AO_5)/sizeof(unsigned));
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else
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I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned));
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}
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29
test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll
Normal file
29
test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll
Normal file
@ -0,0 +1,29 @@
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; RUN: llvm-as < %s | llc -mtriple=thumbv7-none-linux-gnueabi
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; PR4681
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%struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
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%struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
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@.str2 = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1]
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define arm_aapcscc i32 @__mf_heuristic_check(i32 %ptr, i32 %ptr_high) nounwind {
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entry:
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br i1 undef, label %bb1, label %bb
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bb: ; preds = %entry
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unreachable
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bb1: ; preds = %entry
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br i1 undef, label %bb9, label %bb2
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bb2: ; preds = %bb1
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%0 = call i8* @llvm.frameaddress(i32 0) ; <i8*> [#uses=1]
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%1 = call arm_aapcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* noalias undef, i8* noalias getelementptr ([30 x i8]* @.str2, i32 0, i32 0), i8* %0, i8* null) nounwind ; <i32> [#uses=0]
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unreachable
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bb9: ; preds = %bb1
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ret i32 undef
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}
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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declare arm_aapcscc i32 @fprintf(%struct.FILE* noalias nocapture, i8* noalias nocapture, ...) nounwind
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