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ARM STRT assembly parsing and encoding.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-08-11 22:18:00 +00:00
parent 41ff834e91
commit 342ebd5f38
3 changed files with 30 additions and 15 deletions
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4
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -945,8 +945,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn,
case ARM::STR_POST_REG:
case ARM::STRB_POST_IMM:
case ARM::STRB_POST_REG:
case ARM::STRTr:
case ARM::STRTi:
case ARM::STRT_POST_REG:
case ARM::STRT_POST_IMM:
case ARM::STRBT_POST_REG:
case ARM::STRBT_POST_IMM:
if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false;