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Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -8,6 +8,7 @@ add_llvm_library(LLVMCodeGen
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IfConversion.cpp
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IntrinsicLowering.cpp
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LLVMTargetMachine.cpp
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LatencyPriorityQueue.cpp
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LiveInterval.cpp
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LiveIntervalAnalysis.cpp
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LiveStackAnalysis.cpp
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@@ -40,6 +41,10 @@ add_llvm_library(LLVMCodeGen
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RegAllocSimple.cpp
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RegisterCoalescer.cpp
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RegisterScavenging.cpp
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ScheduleDAG.cpp
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ScheduleDAGEmit.cpp
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ShadowStackGC.cpp
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SimpleRegisterCoalescing.cpp
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StackProtector.cpp
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