From 3462cae44fb12e22474e935e77d010f4461a6697 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 3 Feb 2002 07:28:30 +0000 Subject: [PATCH] * Get machine instrs from Instructin's by using MachineCodeForInstruction::get * Convert a few (*X). to X-> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1643 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/InstrSched/InstrScheduling.cpp | 20 +++++++++---------- .../SparcV9/InstrSched/InstrScheduling.cpp | 20 +++++++++---------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index ea41b6f8222..292c2c55e1c 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -10,17 +10,17 @@ //**************************************************************************/ -//************************* User Include Files *****************************/ - #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Instruction.h" +#include "llvm/CodeGen/MachineCodeForInstruction.h" +#include "llvm/CodeGen/MachineCodeForMethod.h" +#include "llvm/Target/TargetMachine.h" #include "Support/CommandLine.h" #include "SchedPriorities.h" +#include #include #include -#include #include using std::cerr; using std::vector; @@ -1284,12 +1284,12 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S, // static void ChooseInstructionsForDelaySlots(SchedulingManager& S, - const BasicBlock* bb, - SchedGraph* graph) + const BasicBlock *bb, + SchedGraph *graph) { const MachineInstrInfo& mii = S.getInstrInfo(); - const TerminatorInst* termInstr = bb->getTerminator(); - MachineCodeForVMInstr& termMvec = termInstr->getMachineInstrVec(); + const TerminatorInst *termInstr = bb->getTerminator(); + MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr); vector delayNodeVec; const MachineInstr* brInstr = NULL; @@ -1507,7 +1507,7 @@ ScheduleInstructionsWithSSA(Method* method, for (SchedGraphSet::const_iterator GI=graphSet.begin(); GI != graphSet.end(); ++GI) { - SchedGraph* graph = (*GI).second; + SchedGraph* graph = GI->second; const vector& bbvec = graph->getBasicBlocks(); assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks"); const BasicBlock* bb = bbvec[0]; @@ -1522,7 +1522,7 @@ ScheduleInstructionsWithSSA(Method* method, ForwardListSchedule(S); // computes schedule in S - RecordSchedule((*GI).first, S); // records schedule in BB + RecordSchedule(GI->first, S); // records schedule in BB } if (SchedDebugLevel >= Sched_PrintMachineCode) diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index ea41b6f8222..292c2c55e1c 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -10,17 +10,17 @@ //**************************************************************************/ -//************************* User Include Files *****************************/ - #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Instruction.h" +#include "llvm/CodeGen/MachineCodeForInstruction.h" +#include "llvm/CodeGen/MachineCodeForMethod.h" +#include "llvm/Target/TargetMachine.h" #include "Support/CommandLine.h" #include "SchedPriorities.h" +#include #include #include -#include #include using std::cerr; using std::vector; @@ -1284,12 +1284,12 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S, // static void ChooseInstructionsForDelaySlots(SchedulingManager& S, - const BasicBlock* bb, - SchedGraph* graph) + const BasicBlock *bb, + SchedGraph *graph) { const MachineInstrInfo& mii = S.getInstrInfo(); - const TerminatorInst* termInstr = bb->getTerminator(); - MachineCodeForVMInstr& termMvec = termInstr->getMachineInstrVec(); + const TerminatorInst *termInstr = bb->getTerminator(); + MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr); vector delayNodeVec; const MachineInstr* brInstr = NULL; @@ -1507,7 +1507,7 @@ ScheduleInstructionsWithSSA(Method* method, for (SchedGraphSet::const_iterator GI=graphSet.begin(); GI != graphSet.end(); ++GI) { - SchedGraph* graph = (*GI).second; + SchedGraph* graph = GI->second; const vector& bbvec = graph->getBasicBlocks(); assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks"); const BasicBlock* bb = bbvec[0]; @@ -1522,7 +1522,7 @@ ScheduleInstructionsWithSSA(Method* method, ForwardListSchedule(S); // computes schedule in S - RecordSchedule((*GI).first, S); // records schedule in BB + RecordSchedule(GI->first, S); // records schedule in BB } if (SchedDebugLevel >= Sched_PrintMachineCode)