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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-20 11:29:24 +00:00
Shrinkify some more intrinsic definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -156,10 +156,6 @@ def VSLDOI : VAForm_2<44, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, u5imm:$SH),
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imm:$SH))]>;
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imm:$SH))]>;
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// VX-Form instructions. AltiVec arithmetic ops.
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// VX-Form instructions. AltiVec arithmetic ops.
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def VADDCUW : VXForm_1<384, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vaddcuw $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vaddcuw VRRC:$vA, VRRC:$vB))]>;
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def VADDFP : VXForm_1<10, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VADDFP : VXForm_1<10, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vaddfp $vD, $vA, $vB", VecFP,
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"vaddfp $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD, (fadd VRRC:$vA, VRRC:$vB))]>;
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[(set VRRC:$vD, (fadd VRRC:$vA, VRRC:$vB))]>;
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@ -174,31 +170,15 @@ def VADDUWM : VXForm_1<128, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vadduwm $vD, $vA, $vB", VecGeneral,
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"vadduwm $vD, $vA, $vB", VecGeneral,
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[(set VRRC:$vD, (add (v4i32 VRRC:$vA), VRRC:$vB))]>;
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[(set VRRC:$vD, (add (v4i32 VRRC:$vA), VRRC:$vB))]>;
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def VADDSBS : VXForm_1<768, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VADDCUW : VX1_Int<384, "vaddcuw", int_ppc_altivec_vaddcuw>;
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"vaddsbs $vD, $vA, $vB", VecFP,
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def VADDSBS : VX1_Int<768, "vaddsbs", int_ppc_altivec_vaddsbs>;
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[(set VRRC:$vD,
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def VADDSHS : VX1_Int<832, "vaddshs", int_ppc_altivec_vaddshs>;
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(int_ppc_altivec_vaddsbs VRRC:$vA, VRRC:$vB))]>;
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def VADDSWS : VX1_Int<896, "vaddsws", int_ppc_altivec_vaddsws>;
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def VADDSHS : VXForm_1<832, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VADDUBS : VX1_Int<512, "vaddubs", int_ppc_altivec_vaddubs>;
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"vaddshs $vD, $vA, $vB", VecFP,
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def VADDUHS : VX1_Int<576, "vadduhs", int_ppc_altivec_vadduhs>;
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[(set VRRC:$vD,
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def VADDUWS : VX1_Int<640, "vadduws", int_ppc_altivec_vadduws>;
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(int_ppc_altivec_vaddshs VRRC:$vA, VRRC:$vB))]>;
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def VADDSWS : VXForm_1<896, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vaddsws $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vaddsws VRRC:$vA, VRRC:$vB))]>;
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def VADDUBS : VXForm_1<512, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vaddubs $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vaddubs VRRC:$vA, VRRC:$vB))]>;
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def VADDUHS : VXForm_1<576, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vadduhs $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vadduhs VRRC:$vA, VRRC:$vB))]>;
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def VADDUWS : VXForm_1<640, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vadduws $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vadduws VRRC:$vA, VRRC:$vB))]>;
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def VAND : VXForm_1<1028, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VAND : VXForm_1<1028, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vand $vD, $vA, $vB", VecFP,
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"vand $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD, (and (v4i32 VRRC:$vA), VRRC:$vB))]>;
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[(set VRRC:$vD, (and (v4i32 VRRC:$vA), VRRC:$vB))]>;
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@ -220,12 +200,9 @@ def VCTSXS : VXForm_1<970, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB),
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def VCTUXS : VXForm_1<906, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB),
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def VCTUXS : VXForm_1<906, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB),
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"vctuxs $vD, $vB, $UIMM", VecFP,
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"vctuxs $vD, $vB, $UIMM", VecFP,
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[]>;
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[]>;
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def VEXPTEFP : VXForm_2<394, (ops VRRC:$vD, VRRC:$vB),
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def VEXPTEFP : VX2_Int<394, "vexptefp", int_ppc_altivec_vexptefp>;
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"vexptefp $vD, $vB", VecFP,
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def VLOGEFP : VX2_Int<458, "vlogefp", int_ppc_altivec_vlogefp>;
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[(set VRRC:$vD, (int_ppc_altivec_vexptefp VRRC:$vB))]>;
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def VLOGEFP : VXForm_2<458, (ops VRRC:$vD, VRRC:$vB),
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"vlogefp $vD, $vB", VecFP,
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[(set VRRC:$vD, (int_ppc_altivec_vlogefp VRRC:$vB))]>;
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def VMAXFP : VXForm_1<1034, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VMAXFP : VXForm_1<1034, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vmaxfp $vD, $vA, $vB", VecFP,
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"vmaxfp $vD, $vA, $vB", VecFP,
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[]>;
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[]>;
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@ -353,24 +330,12 @@ def VPKUWUM : VXForm_1<78, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VPKUWUS : VX1_Int<206, "vpkuwus", int_ppc_altivec_vpkuwus>;
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def VPKUWUS : VX1_Int<206, "vpkuwus", int_ppc_altivec_vpkuwus>;
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// Vector Unpack.
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// Vector Unpack.
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def VUPKHPX : VXForm_2<846, (ops VRRC:$vD, VRRC:$vB),
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def VUPKHPX : VX2_Int<846, "vupkhpx", int_ppc_altivec_vupkhpx>;
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"vupkhpx $vD, $vB", VecFP,
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def VUPKHSB : VX2_Int<526, "vupkhsb", int_ppc_altivec_vupkhsb>;
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[(set VRRC:$vD, (int_ppc_altivec_vupkhpx VRRC:$vB))]>;
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def VUPKHSH : VX2_Int<590, "vupkhsh", int_ppc_altivec_vupkhsh>;
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def VUPKHSB : VXForm_2<526, (ops VRRC:$vD, VRRC:$vB),
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def VUPKLPX : VX2_Int<974, "vupklpx", int_ppc_altivec_vupklpx>;
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"vupkhsb $vD, $vB", VecFP,
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def VUPKLSB : VX2_Int<654, "vupklsb", int_ppc_altivec_vupklsb>;
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[(set VRRC:$vD, (int_ppc_altivec_vupkhsb VRRC:$vB))]>;
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def VUPKLSH : VX2_Int<718, "vupklsh", int_ppc_altivec_vupklsh>;
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def VUPKHSH : VXForm_2<590, (ops VRRC:$vD, VRRC:$vB),
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"vupkhsh $vD, $vB", VecFP,
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[(set VRRC:$vD, (int_ppc_altivec_vupkhsh VRRC:$vB))]>;
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def VUPKLPX : VXForm_2<974, (ops VRRC:$vD, VRRC:$vB),
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"vupklpx $vD, $vB", VecFP,
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[(set VRRC:$vD, (int_ppc_altivec_vupklpx VRRC:$vB))]>;
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def VUPKLSB : VXForm_2<654, (ops VRRC:$vD, VRRC:$vB),
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"vupklsb $vD, $vB", VecFP,
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[(set VRRC:$vD, (int_ppc_altivec_vupklsb VRRC:$vB))]>;
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def VUPKLSH : VXForm_2<718, (ops VRRC:$vD, VRRC:$vB),
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"vupklsh $vD, $vB", VecFP,
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[(set VRRC:$vD, (int_ppc_altivec_vupklsh VRRC:$vB))]>;
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// Altivec Comparisons.
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// Altivec Comparisons.
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