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Fix grammaros in comments.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68666 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-04-09 02:06:09 +00:00
parent b9ca608737
commit 349ba4951f
1 changed files with 2 additions and 2 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -7264,12 +7264,12 @@ bool X86TargetLowering::isTruncateFree(MVT VT1, MVT VT2) const {
} }
bool X86TargetLowering::isZExtFree(const Type *Ty1, const Type *Ty2) const { bool X86TargetLowering::isZExtFree(const Type *Ty1, const Type *Ty2) const {
// x86-64 has implicitly zero-extends 32-bit results in 64-bit registers. // x86-64 implicitly zero-extends 32-bit results in 64-bit registers.
return Ty1 == Type::Int32Ty && Ty2 == Type::Int64Ty && Subtarget->is64Bit(); return Ty1 == Type::Int32Ty && Ty2 == Type::Int64Ty && Subtarget->is64Bit();
} }
bool X86TargetLowering::isZExtFree(MVT VT1, MVT VT2) const { bool X86TargetLowering::isZExtFree(MVT VT1, MVT VT2) const {
// x86-64 has implicitly zero-extends 32-bit results in 64-bit registers. // x86-64 implicitly zero-extends 32-bit results in 64-bit registers.
return VT1 == MVT::i32 && VT2 == MVT::i64 && Subtarget->is64Bit(); return VT1 == MVT::i32 && VT2 == MVT::i64 && Subtarget->is64Bit();
} }