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Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -131,13 +131,13 @@ def ARMInstrInfo : InstrInfo {
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let TSFlagsFields = ["AddrModeBits",
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let TSFlagsFields = ["AddrModeBits",
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"SizeFlag",
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"SizeFlag",
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"IndexModeBits",
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"IndexModeBits",
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"isUnaryDataProc",
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"Form",
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"Form"];
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"isUnaryDataProc"];
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let TSFlagsShifts = [0,
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let TSFlagsShifts = [0,
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4,
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4,
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7,
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7,
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9,
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9,
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10];
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15];
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -54,9 +54,16 @@ def NEONGetLnFrm : Format<25>;
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def NEONSetLnFrm : Format<26>;
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def NEONSetLnFrm : Format<26>;
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def NEONDupFrm : Format<27>;
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def NEONDupFrm : Format<27>;
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// Misc flag for data processing instructions that indicates whether
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// Misc flags.
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// the instruction has a Rn register operand.
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// the instruction has a Rn register operand.
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class UnaryDP { bit isUnaryDataProc = 1; }
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// UnaryDP - Indicates this is a unary data processing instruction, i.e.
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// it doesn't have a Rn operand.
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class UnaryDP { bit isUnaryDataProc = 1; }
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// Xform16Bit - Indicates this Thumb2 instruction may be transformed into
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// a 16-bit Thumb instruction if certain conditions are met.
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class Xform16Bit { bit canXformTo16Bit = 1; }
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// ARM Instruction flags. These need to match ARMInstrInfo.h.
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// ARM Instruction flags. These need to match ARMInstrInfo.h.
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@ -130,6 +137,7 @@ class InstARM<AddrMode am, SizeFlagVal sz, IndexMode im,
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// Attributes specific to ARM instructions...
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// Attributes specific to ARM instructions...
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//
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//
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bit isUnaryDataProc = 0;
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bit isUnaryDataProc = 0;
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bit canXformTo16Bit = 0;
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let Constraints = cstr;
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let Constraints = cstr;
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}
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}
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@ -65,18 +65,11 @@ namespace ARMII {
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IndexModePre = 1,
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IndexModePre = 1,
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IndexModePost = 2,
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IndexModePost = 2,
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//===------------------------------------------------------------------===//
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// Misc flags.
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// UnaryDP - Indicates this is a unary data processing instruction, i.e.
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// it doesn't have a Rn operand.
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UnaryDP = 1 << 9,
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//===------------------------------------------------------------------===//
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//===------------------------------------------------------------------===//
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// Instruction encoding formats.
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// Instruction encoding formats.
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//
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//
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FormShift = 10,
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FormShift = 9,
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FormMask = 0x1f << FormShift,
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FormMask = 0x3f << FormShift,
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// Pseudo instructions
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// Pseudo instructions
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Pseudo = 0 << FormShift,
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Pseudo = 0 << FormShift,
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@ -126,6 +119,17 @@ namespace ARMII {
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NEONSetLnFrm = 26 << FormShift,
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NEONSetLnFrm = 26 << FormShift,
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NEONDupFrm = 27 << FormShift,
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NEONDupFrm = 27 << FormShift,
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//===------------------------------------------------------------------===//
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// Misc flags.
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// UnaryDP - Indicates this is a unary data processing instruction, i.e.
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// it doesn't have a Rn operand.
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UnaryDP = 1 << 15,
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// Xform16Bit - Indicates this Thumb2 instruction may be transformed into
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// a 16-bit Thumb instruction if certain conditions are met.
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Xform16Bit = 1 << 16,
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//===------------------------------------------------------------------===//
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//===------------------------------------------------------------------===//
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// Field shifts - such shifts are used to set field while generating
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// Field shifts - such shifts are used to set field while generating
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// machine instructions.
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// machine instructions.
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