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AArch64: fix wrong-endian parameter passing.

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The blocked arguments code didn't take account of the hacks needed to support
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223247 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-12-03 17:49:26 +00:00
parent cf17914f89
commit 34c1d6673e
2 changed files with 21 additions and 3 deletions
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6
lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -2107,7 +2107,8 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
unsigned ArgSize = VA.getValVT().getSizeInBits() / 8;
uint32_t BEAlign = 0;
if (ArgSize < 8 && !Subtarget->isLittleEndian())
if (!Subtarget->isLittleEndian() && ArgSize < 8 &&
!Ins[i].Flags.isInConsecutiveRegs())
BEAlign = 8 - ArgSize;
int FI = MFI->CreateFixedObject(ArgSize, ArgOffset + BEAlign, true);
@ -2661,7 +2662,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8
: VA.getValVT().getSizeInBits();
OpSize = (OpSize + 7) / 8;
if (!Subtarget->isLittleEndian() && !Flags.isByVal()) {
if (!Subtarget->isLittleEndian() && !Flags.isByVal() &&
!Flags.isInConsecutiveRegs()) {
if (OpSize < 8)
BEAlign = 8 - OpSize;
}

18
test/CodeGen/AArch64/arm64-aapcs-be.ll
View File

@ -21,4 +21,20 @@ entry:
; CHECK-DAG: strh w{{[0-9]}}, [sp, #14]
; CHECK-DAG: strb w{{[0-9]}}, [sp, #7]
ret i32 %call
}
}
define float @test_block_addr([8 x float], [1 x float] %in) {
; CHECK-LABEL: test_block_addr:
; CHECK: ldr s0, [sp]
%val = extractvalue [1 x float] %in, 0
ret float %val
}
define void @test_block_addr_callee() {
; CHECK-LABEL: test_block_addr_callee:
; CHECK: str {{[a-z0-9]+}}, [sp]
; CHECK: bl test_block_addr
%val = insertvalue [1 x float] undef, float 0.0, 0
call float @test_block_addr([8 x float] undef, [1 x float] %val)
ret void
}