6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-21 02:29:22 +00:00
Code Issues Projects Releases Wiki Activity

[X86] Simplify code a little by just summing flags instead of conditionally incrementing. NFC

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225156 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2015-01-05 08:19:10 +00:00
parent a481b50d75
commit 34f96b9cc3
1 changed files with 7 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
lib/Target/X86/MCTargetDesc/X86BaseInfo.h
View File

@ -676,16 +676,10 @@ namespace X86II {
return -1;
case X86II::MRMDestMem:
return 0;
case X86II::MRMSrcMem: {
unsigned FirstMemOp = 1;
if (HasVEX_4V)
++FirstMemOp;// Skip the register source (which is encoded in VEX_VVVV).
if (HasMemOp4)
++FirstMemOp;// Skip the register source (which is encoded in I8IMM).
if (HasEVEX_K)
++FirstMemOp;// Skip the mask register
return FirstMemOp;
}
case X86II::MRMSrcMem:
// Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
// mask register.
return 1 + HasVEX_4V + HasMemOp4 + HasEVEX_K;
case X86II::MRMXr:
case X86II::MRM0r: case X86II::MRM1r:
case X86II::MRM2r: case X86II::MRM3r:
@ -696,14 +690,9 @@ namespace X86II {
case X86II::MRM0m: case X86II::MRM1m:
case X86II::MRM2m: case X86II::MRM3m:
case X86II::MRM4m: case X86II::MRM5m:
case X86II::MRM6m: case X86II::MRM7m: {
unsigned FirstMemOp = 0;
if (HasVEX_4V)
++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV).
if (HasEVEX_K)
++FirstMemOp;// Skip the mask register
return FirstMemOp;
}
case X86II::MRM6m: case X86II::MRM7m:
// Start from 0, skip registers encoded in VEX_VVVV or a mask register.
return 0 + HasVEX_4V + HasEVEX_K;
case X86II::MRM_C0: case X86II::MRM_C1: case X86II::MRM_C2:
case X86II::MRM_C3: case X86II::MRM_C4: case X86II::MRM_C8:
case X86II::MRM_C9: case X86II::MRM_CA: case X86II::MRM_CB: