mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Tighten operand checking on CPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
438f68df35
commit
35008c2f8d
@ -1390,6 +1390,7 @@ class CPS<dag iops, string asm_ops>
|
||||
let Inst{4-0} = mode;
|
||||
}
|
||||
|
||||
let DecoderMethod = "DecodeCPSInstruction" in {
|
||||
let M = 1 in
|
||||
def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, imm0_31:$mode),
|
||||
"$imod\t$iflags, $mode">;
|
||||
@ -1398,6 +1399,7 @@ let mode = 0, M = 0 in
|
||||
|
||||
let imod = 0, iflags = 0, M = 1 in
|
||||
def CPS1p : CPS<(ins imm0_31:$mode), "\t$mode">;
|
||||
}
|
||||
|
||||
// Preload signals the memory system of possible future data/instruction access.
|
||||
// These are for disassembly only.
|
||||
|
@ -83,6 +83,8 @@ static bool DecodeMemMultipleWritebackInstruction(llvm::MCInst & Inst,
|
||||
const void *Decoder);
|
||||
static bool DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn,
|
||||
uint64_t Address, const void *Decoder);
|
||||
static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
|
||||
uint64_t Address, const void *Decoder);
|
||||
static bool DecodeAddrModeImm12Operand(llvm::MCInst &Inst, unsigned Val,
|
||||
uint64_t Address, const void *Decoder);
|
||||
static bool DecodeAddrMode5Operand(llvm::MCInst &Inst, unsigned Val,
|
||||
@ -1139,6 +1141,9 @@ static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
|
||||
unsigned iflags = fieldFromInstruction32(Insn, 6, 3);
|
||||
unsigned mode = fieldFromInstruction32(Insn, 0, 5);
|
||||
|
||||
// imod == '01' --> UNPREDICTABLE
|
||||
if (imod == 1) return false;
|
||||
|
||||
if (M && mode && imod && iflags) {
|
||||
Inst.setOpcode(ARM::CPS3p);
|
||||
Inst.addOperand(MCOperand::CreateImm(imod));
|
||||
|
@ -1,5 +1,4 @@
|
||||
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
|
||||
# XFAIL: *
|
||||
|
||||
# invalid imod value (0b01)
|
||||
0xc0 0x67 0x4 0xf1
|
||||
|
@ -1,5 +1,4 @@
|
||||
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
|
||||
# XFAIL: *
|
||||
|
||||
# invalid (imod, M, iflags) combination
|
||||
0x93 0x1c 0x02 0xf1
|
||||
|
Loading…
Reference in New Issue
Block a user