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SelectionDAGBuilder: move constant initialization out of loop

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No semantic change intended.

Reviewers: resistor

Differential Revision: http://reviews.llvm.org/D6834



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225278 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Mehdi Amini 2015-01-06 18:20:04 +00:00
parent 1f996fa36b
commit 35300ff218
1 changed files with 20 additions and 16 deletions
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24
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -1238,12 +1238,10 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
unsigned NumValues = ValueVTs.size(); unsigned NumValues = ValueVTs.size();
if (NumValues) { if (NumValues) {
SDValue RetOp = getValue(I.getOperand(0)); SDValue RetOp = getValue(I.getOperand(0));
for (unsigned j = 0, f = NumValues; j != f; ++j) {
EVT VT = ValueVTs[j];
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
const Function *F = I.getParent()->getParent(); const Function *F = I.getParent()->getParent();
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex, if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
Attribute::SExt)) Attribute::SExt))
ExtendKind = ISD::SIGN_EXTEND; ExtendKind = ISD::SIGN_EXTEND;
@ -1251,11 +1249,18 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
Attribute::ZExt)) Attribute::ZExt))
ExtendKind = ISD::ZERO_EXTEND; ExtendKind = ISD::ZERO_EXTEND;
if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) LLVMContext &Context = F->getContext();
VT = TLI.getTypeForExtArgOrReturn(*DAG.getContext(), VT, ExtendKind); bool RetInReg = F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
Attribute::InReg);
unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), VT); for (unsigned j = 0; j != NumValues; ++j) {
MVT PartVT = TLI.getRegisterType(*DAG.getContext(), VT); EVT VT = ValueVTs[j];
if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
VT = TLI.getTypeForExtArgOrReturn(Context, VT, ExtendKind);
unsigned NumParts = TLI.getNumRegisters(Context, VT);
MVT PartVT = TLI.getRegisterType(Context, VT);
SmallVector<SDValue, 4> Parts(NumParts); SmallVector<SDValue, 4> Parts(NumParts);
getCopyToParts(DAG, getCurSDLoc(), getCopyToParts(DAG, getCurSDLoc(),
SDValue(RetOp.getNode(), RetOp.getResNo() + j), SDValue(RetOp.getNode(), RetOp.getResNo() + j),
@ -1263,8 +1268,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
// 'inreg' on function refers to return value // 'inreg' on function refers to return value
ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy(); ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex, if (RetInReg)
Attribute::InReg))
Flags.setInReg(); Flags.setInReg();
// Propagate extension type if any // Propagate extension type if any