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enhance vmcore to know that udiv's can be exact, and add a trivial
instcombine xform to exercise this. Nothing forms exact udivs yet though. This is progress on PR8862 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124992 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1090,8 +1090,9 @@ bool BitcodeReader::ParseConstants() {
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Flags |= OverflowingBinaryOperator::NoSignedWrap;
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if (Record[3] & (1 << bitc::OBO_NO_UNSIGNED_WRAP))
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Flags |= OverflowingBinaryOperator::NoUnsignedWrap;
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} else if (Opc == Instruction::SDiv) {
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if (Record[3] & (1 << bitc::SDIV_EXACT))
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} else if (Opc == Instruction::SDiv ||
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Opc == Instruction::UDiv) {
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if (Record[3] & (1 << bitc::PEO_EXACT))
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Flags |= SDivOperator::IsExact;
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}
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}
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@ -1905,8 +1906,9 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
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cast<BinaryOperator>(I)->setHasNoSignedWrap(true);
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if (Record[OpNum] & (1 << bitc::OBO_NO_UNSIGNED_WRAP))
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cast<BinaryOperator>(I)->setHasNoUnsignedWrap(true);
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} else if (Opc == Instruction::SDiv) {
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if (Record[OpNum] & (1 << bitc::SDIV_EXACT))
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} else if (Opc == Instruction::SDiv ||
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Opc == Instruction::UDiv) {
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if (Record[OpNum] & (1 << bitc::PEO_EXACT))
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cast<BinaryOperator>(I)->setIsExact(true);
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}
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}
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